diff options
| author | fauxpark <fauxpark@gmail.com> | 2019-11-15 13:25:40 +1100 |
|---|---|---|
| committer | James Young <18669334+noroadsleft@users.noreply.github.com> | 2019-11-14 18:25:40 -0800 |
| commit | f98750de6edf97559ed53be4b5b5c1b4851acf3e (patch) | |
| tree | d555bc93b4beedc78f6d4a615e2b45a6d324aca8 | |
| parent | c19e4da8af6954c70760ef3803fbf729d007c1d8 (diff) | |
[Core] Cleanup rules.mk for F303 keyboards (#7306)0.7.77
* Cleanup rules.mk for F303 keyboards
* Fix small typo
37 files changed, 98 insertions, 4305 deletions
diff --git a/keyboards/1upkeyboards/sweet16/v1/rules.mk b/keyboards/1upkeyboards/sweet16/v1/rules.mk index 0defba1f19..09bd9e9e25 100644 --- a/keyboards/1upkeyboards/sweet16/v1/rules.mk +++ b/keyboards/1upkeyboards/sweet16/v1/rules.mk @@ -1,5 +1,17 @@ +# MCU name MCU = atmega32u4 + +# Bootloader selection +# Teensy halfkay +# Pro Micro caterina +# Atmel DFU atmel-dfu +# LUFA DFU lufa-dfu +# QMK DFU qmk-dfu +# ATmega32A bootloadHID +# ATmega328P USBasp BOOTLOADER = caterina -LINK_TIME_OPTIMIZATION_ENABLE=yes + RGBLIGHT_ENABLE = yes -BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality +BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality + +LINK_TIME_OPTIMIZATION_ENABLE = yes diff --git a/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk b/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk index 4b08a7e6b0..9f38504a8c 100644 --- a/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk +++ b/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk @@ -1,6 +1,15 @@ +# MCU name MCU = atmega32u4 + +# Bootloader selection +# Teensy halfkay +# Pro Micro caterina +# Atmel DFU atmel-dfu +# LUFA DFU lufa-dfu +# QMK DFU qmk-dfu +# ATmega32A bootloadHID +# ATmega328P USBasp BOOTLOADER = caterina -LINK_TIME_OPTIMIZATION_ENABLE=yes ## Features CONSOLE_ENABLE = yes @@ -8,3 +17,5 @@ CONSOLE_ENABLE = yes ## On a Pro Micro you have to choose between underglow and the rotary encoder. RGBLIGHT_ENABLE = no ENCODER_ENABLE = yes + +LINK_TIME_OPTIMIZATION_ENABLE = yes diff --git a/keyboards/1upkeyboards/sweet16/v2/proton_c/rules.mk b/keyboards/1upkeyboards/sweet16/v2/proton_c/rules.mk index 3bfa1623fd..dedcf043af 100644 --- a/keyboards/1upkeyboards/sweet16/v2/proton_c/rules.mk +++ b/keyboards/1upkeyboards/sweet16/v2/proton_c/rules.mk @@ -1,3 +1,4 @@ +# MCU name MCU = STM32F303 ## Features diff --git a/keyboards/boston_meetup/2019/rules.mk b/keyboards/boston_meetup/2019/rules.mk index 7c03a025ee..73f9008f01 100644 --- a/keyboards/boston_meetup/2019/rules.mk +++ b/keyboards/boston_meetup/2019/rules.mk @@ -1,7 +1,5 @@ -# project specific files - -# Cortex version -MCU = STM32F303 +# MCU name +MCU = STM32F303 # Build Options # comment out to disable the options. diff --git a/keyboards/ckeys/thedora/rules.mk b/keyboards/ckeys/thedora/rules.mk index 11adbdacd4..92665ffb6d 100755 --- a/keyboards/ckeys/thedora/rules.mk +++ b/keyboards/ckeys/thedora/rules.mk @@ -1,3 +1,4 @@ +# MCU name MCU = STM32F303 # Build Options diff --git a/keyboards/clueboard/60/rules.mk b/keyboards/clueboard/60/rules.mk index a0927025bb..a9151b87d2 100644 --- a/keyboards/clueboard/60/rules.mk +++ b/keyboards/clueboard/60/rules.mk @@ -1,41 +1,5 @@ -# project specific files -SRC = led.c -LAYOUTS += 60_ansi 60_ansi_split_bs_rshift 60_iso - -## chip/board settings -# - the next two should match the directories in -# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) -MCU_FAMILY = STM32 -MCU_SERIES = STM32F3xx - -# Linker script to use -# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ -# or <this_dir>/ld/ -MCU_LDSCRIPT = STM32F303xC - -# Startup code to use -# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ -MCU_STARTUP = stm32f3xx - -# Board: it should exist either in <chibios>/os/hal/boards/ -# or <this_dir>/boards -BOARD = GENERIC_STM32_F303XC - -# Cortex version -MCU = cortex-m4 - -# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 -ARMV = 7 - -USE_FPU = yes - -# Vector table for application -# 0x00000000-0x00001000 area is occupied by bootlaoder.*/ -OPT_DEFS = - -# Options to pass to dfu-util when flashing -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -p DF11 -v 0483 +# MCU name +MCU = STM32F303 # Build Options # comment out to disable the options. @@ -48,3 +12,7 @@ CONSOLE_ENABLE = yes # Console for debug COMMAND_ENABLE = no # Commands for debug and configuration NKRO_ENABLE = yes # USB Nkey Rollover AUDIO_ENABLE = yes + +# project specific files +SRC = led.c +LAYOUTS += 60_ansi 60_ansi_split_bs_rshift 60_iso diff --git a/keyboards/clueboard/66/rev4/rules.mk b/keyboards/clueboard/66/rev4/rules.mk index 4d20ff2e96..ef7989aa0b 100644 --- a/keyboards/clueboard/66/rev4/rules.mk +++ b/keyboards/clueboard/66/rev4/rules.mk @@ -1,19 +1,5 @@ -LAYOUTS = 66_ansi 66_iso - -## chip/board settings -MCU_FAMILY = STM32 -MCU_SERIES = STM32F3xx -MCU_LDSCRIPT = STM32F303xC -MCU_STARTUP = stm32f3xx -BOARD = GENERIC_STM32_F303XC -MCU = cortex-m4 -ARMV = 7 -USE_FPU = yes -OPT_DEFS = - -# Options to pass to dfu-util when flashing -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -p DF11 -v 0483 +# MCU name +MCU = STM32F303 # Build Options # comment out to disable the options. @@ -31,3 +17,5 @@ MIDI_ENABLE = no # MIDI controls UNICODE_ENABLE = no # Unicode BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID AUDIO_ENABLE = yes + +LAYOUTS = 66_ansi 66_iso diff --git a/keyboards/clueboard/66_hotswap/gen1/rules.mk b/keyboards/clueboard/66_hotswap/gen1/rules.mk index 326912a34b..50f140defa 100644 --- a/keyboards/clueboard/66_hotswap/gen1/rules.mk +++ b/keyboards/clueboard/66_hotswap/gen1/rules.mk @@ -1,43 +1,5 @@ -# project specific files -SRC = led.c -LAYOUTS += 66_ansi - -## chip/board settings -# - the next two should match the directories in -# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) -MCU_FAMILY = STM32 -MCU_SERIES = STM32F3xx - -# Linker script to use -# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ -# or <this_dir>/ld/ -MCU_LDSCRIPT = STM32F303xC - -# Startup code to use -# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ -MCU_STARTUP = stm32f3xx - -# Board: it should exist either in <chibios>/os/hal/boards/ -# or <this_dir>/boards -BOARD = GENERIC_STM32_F303XC - -# Cortex version -MCU = cortex-m4 - -# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 -ARMV = 7 - -USE_FPU = yes - -# Vector table for application -# 0x00000000-0x00001000 area is occupied by bootlaoder.*/ -# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB -# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 -OPT_DEFS = - -# Options to pass to dfu-util when flashing -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -p DF11 -v 0483 +# MCU name +MCU = STM32F303 # LED Configuration LED_MATRIX_ENABLE = IS31FL3731 @@ -57,3 +19,7 @@ NKRO_ENABLE = yes # USB Nkey Rollover #CUSTOM_MATRIX = yes # Custom matrix file AUDIO_ENABLE = yes # SERIAL_LINK_ENABLE = yes + +# project specific files +SRC = led.c +LAYOUTS += 66_ansi diff --git a/keyboards/clueboard/california/rules.mk b/keyboards/clueboard/california/rules.mk index e9362ffb73..e96afd8135 100644 --- a/keyboards/clueboard/california/rules.mk +++ b/keyboards/clueboard/california/rules.mk @@ -1,3 +1,4 @@ +# MCU name MCU = STM32F303 ## Features diff --git a/keyboards/dztech/dz60rgb/rules.mk b/keyboards/dztech/dz60rgb/rules.mk index ed30bec8b6..f381ca585c 100644 --- a/keyboards/dztech/dz60rgb/rules.mk +++ b/keyboards/dztech/dz60rgb/rules.mk @@ -1,6 +1,6 @@ -MCU = STM32F303 -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -p DF11 -v 0483 +# MCU name +MCU = STM32F303 + BACKLIGHT_ENABLE = no BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration MOUSEKEY_ENABLE = yes # Mouse keys @@ -11,4 +11,4 @@ COMMAND_ENABLE = no # Commands for debug and configuration NKRO_ENABLE = no # USB Nkey Rollover AUDIO_ENABLE = no RGB_MATRIX_ENABLE = IS31FL3733 # Use RGB matrix -NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in
\ No newline at end of file +NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in diff --git a/keyboards/dztech/dz60rgb_ansi/rules.mk b/keyboards/dztech/dz60rgb_ansi/rules.mk index 006541504a..0636150529 100644 --- a/keyboards/dztech/dz60rgb_ansi/rules.mk +++ b/keyboards/dztech/dz60rgb_ansi/rules.mk @@ -1,6 +1,6 @@ -MCU = STM32F303 -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -p DF11 -v 0483 +# MCU name +MCU = STM32F303 + BACKLIGHT_ENABLE = no BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration MOUSEKEY_ENABLE = yes # Mouse keys @@ -13,4 +13,4 @@ AUDIO_ENABLE = no RGB_MATRIX_ENABLE = IS31FL3733 # Use RGB matrix NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in -LAYOUTS = 60_ansi
\ No newline at end of file +LAYOUTS = 60_ansi diff --git a/keyboards/dztech/dz65rgb/rules.mk b/keyboards/dztech/dz65rgb/rules.mk index bf392b4faa..6e80abf472 100644 --- a/keyboards/dztech/dz65rgb/rules.mk +++ b/keyboards/dztech/dz65rgb/rules.mk @@ -1,6 +1,6 @@ -MCU = STM32F303 -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -p DF11 -v 0483 +# MCU name +MCU = STM32F303 + BACKLIGHT_ENABLE = no BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration MOUSEKEY_ENABLE = yes # Mouse keys diff --git a/keyboards/hadron/rules.mk b/keyboards/hadron/rules.mk index bd1633f619..8498675750 100644 --- a/keyboards/hadron/rules.mk +++ b/keyboards/hadron/rules.mk @@ -1,2 +1 @@ - DEFAULT_FOLDER = hadron/ver2 diff --git a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c deleted file mode 100644 index 4331155df4..0000000000 --- a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -#if HAL_USE_PAL || defined(__DOXYGEN__) -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -const PALConfig pal_default_config = { -#if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, -#endif -#if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, -#endif -#if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, -#endif -#if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, -#endif -#if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, -#endif -#if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, -#endif -#if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, -#endif -#if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, -#endif -#if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} -#endif -}; -#endif - -void enter_bootloader_mode_if_requested(void); - -/** - * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. - */ -void __early_init(void) { - enter_bootloader_mode_if_requested(); - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief SDC card write protection detection. - */ -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) { -} diff --git a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h deleted file mode 100644 index ec26557f3a..0000000000 --- a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h +++ /dev/null @@ -1,1187 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for Clueboard 60% Keyboard - */ - -/* - * Board identifier. - */ -#define BOARD_GENERIC_STM32_F303XC -#define BOARD_NAME "Planck PCB" - -/* - * Board oscillators-related settings. - * NOTE: LSE not fitted. - */ -#if !defined(STM32_LSECLK) -#define STM32_LSECLK 0U -#endif - -#define STM32_LSEDRV (3U << 3U) - -#if !defined(STM32_HSECLK) -#define STM32_HSECLK 8000000U -#endif - -// #define STM32_HSE_BYPASS - -/* - * MCU type as defined in the ST header. - */ -#define STM32F303xC - -/* - * IO pins assignments. - */ -#define GPIOA_PIN0 0U -#define GPIOA_PIN1 1U -#define GPIOA_PIN2 2U -#define GPIOA_PIN3 3U -#define GPIOA_PIN4 4U -#define GPIOA_PIN5 5U -#define GPIOA_PIN6 6U -#define GPIOA_PIN7 7U -#define GPIOA_PIN8 8U -#define GPIOA_PIN9 9U -#define GPIOA_PIN10 10U -#define GPIOA_USB_DM 11U -#define GPIOA_USB_DP 12U -#define GPIOA_SWDIO 13U -#define GPIOA_SWCLK 14U -#define GPIOA_PIN15 15U - -#define GPIOB_PIN0 0U -#define GPIOB_PIN1 1U -#define GPIOB_PIN2 2U -#define GPIOB_PIN3 3U -#define GPIOB_PIN4 4U -#define GPIOB_PIN5 5U -#define GPIOB_PIN6 6U -#define GPIOB_PIN7 7U -#define GPIOB_PIN8 8U -#define GPIOB_PIN9 9U -#define GPIOB_PIN10 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_PIN13 13U -#define GPIOB_PIN14 14U -#define GPIOB_PIN15 15U - -#define GPIOC_PIN0 0U -#define GPIOC_PIN1 1U -#define GPIOC_PIN2 2U -#define GPIOC_PIN3 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_PIN6 6U -#define GPIOC_PIN7 7U -#define GPIOC_PIN8 8U -#define GPIOC_PIN9 9U -#define GPIOC_PIN10 10U -#define GPIOC_PIN11 11U -#define GPIOC_PIN12 12U -#define GPIOC_PIN13 13U -#define GPIOC_PIN14 14U -#define GPIOC_PIN15 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_PIN4 4U -#define GPIOD_PIN5 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_PIN12 12U -#define GPIOD_PIN13 13U -#define GPIOD_PIN14 14U -#define GPIOD_PIN15 15U - -#define GPIOE_PIN0 0U -#define GPIOE_PIN1 1U -#define GPIOE_PIN2 2U -#define GPIOE_PIN3 3U -#define GPIOE_PIN4 4U -#define GPIOE_PIN5 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_I2C2_SDA 0U -#define GPIOF_I2C2_SCL 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -#define GPIOG_PIN0 0U -#define GPIOG_PIN1 1U -#define GPIOG_PIN2 2U -#define GPIOG_PIN3 3U -#define GPIOG_PIN4 4U -#define GPIOG_PIN5 5U -#define GPIOG_PIN6 6U -#define GPIOG_PIN7 7U -#define GPIOG_PIN8 8U -#define GPIOG_PIN9 9U -#define GPIOG_PIN10 10U -#define GPIOG_PIN11 11U -#define GPIOG_PIN12 12U -#define GPIOG_PIN13 13U -#define GPIOG_PIN14 14U -#define GPIOG_PIN15 15U - -#define GPIOH_PIN0 0U -#define GPIOH_PIN1 1U -#define GPIOH_PIN2 2U -#define GPIOH_PIN3 3U -#define GPIOH_PIN4 4U -#define GPIOH_PIN5 5U -#define GPIOH_PIN6 6U -#define GPIOH_PIN7 7U -#define GPIOH_PIN8 8U -#define GPIOH_PIN9 9U -#define GPIOH_PIN10 10U -#define GPIOH_PIN11 11U -#define GPIOH_PIN12 12U -#define GPIOH_PIN13 13U -#define GPIOH_PIN14 14U -#define GPIOH_PIN15 15U - -/* - * IO lines assignments. - */ -#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U) -#define LINE_USB_DM PAL_LINE(GPIOA, 11U) -#define LINE_USB_DP PAL_LINE(GPIOA, 12U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) - -#define LINE_PIN6 PAL_LINE(GPIOF, 0U) -#define LINE_PIN7 PAL_LINE(GPIOF, 1U) - -#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U) - - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) - -/* - * GPIOA setup: - * - * PA0 - NC - * PA1 - NC - * PA2 - COL1 - * PA3 - COL2 - * PA4 - SPEAKER1 - * PA5 - SPEAKER2 - * PA6 - COL3 - * PA7 - COL8 - * PA8 - COL6 - * PA9 - COL7 - * PA10 - ROW5 - * PA11 - USB_DM (alternate 14). - * PA12 - USB_DP (alternate 14). - * PA13 - SWDIO (alternate 0). - * PA14 - SWCLK (alternate 0). - * PA15 - ROW4 - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \ - PIN_MODE_ALTERNATE(GPIOA_PIN1) | \ - PIN_MODE_INPUT(GPIOA_PIN2) | \ - PIN_MODE_INPUT(GPIOA_PIN3) | \ - PIN_MODE_INPUT(GPIOA_PIN4) | \ - PIN_MODE_INPUT(GPIOA_PIN5) | \ - PIN_MODE_INPUT(GPIOA_PIN6) | \ - PIN_MODE_INPUT(GPIOA_PIN7) | \ - PIN_MODE_INPUT(GPIOA_PIN8) | \ - PIN_MODE_INPUT(GPIOA_PIN9) | \ - PIN_MODE_INPUT(GPIOA_PIN10) | \ - PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \ - PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \ - PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ - PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ - PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \ - PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \ - PIN_OSPEED_HIGH(GPIOA_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \ - PIN_OSPEED_HIGH(GPIOA_USB_DM) | \ - PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \ - PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ - PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \ - PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \ - PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ - PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \ - PIN_ODR_HIGH(GPIOA_PIN1) | \ - PIN_ODR_HIGH(GPIOA_PIN2) | \ - PIN_ODR_HIGH(GPIOA_PIN3) | \ - PIN_ODR_HIGH(GPIOA_PIN4) | \ - PIN_ODR_HIGH(GPIOA_PIN5) | \ - PIN_ODR_HIGH(GPIOA_PIN6) | \ - PIN_ODR_HIGH(GPIOA_PIN7) | \ - PIN_ODR_HIGH(GPIOA_PIN8) | \ - PIN_ODR_HIGH(GPIOA_PIN9) | \ - PIN_ODR_HIGH(GPIOA_PIN10) | \ - PIN_ODR_HIGH(GPIOA_USB_DM) | \ - PIN_ODR_HIGH(GPIOA_USB_DP) | \ - PIN_ODR_HIGH(GPIOA_SWDIO) | \ - PIN_ODR_HIGH(GPIOA_SWCLK) | \ - PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \ - PIN_AFIO_AF(GPIOA_PIN1, 1) | \ - PIN_AFIO_AF(GPIOA_PIN2, 0) | \ - PIN_AFIO_AF(GPIOA_PIN3, 0) | \ - PIN_AFIO_AF(GPIOA_PIN4, 0) | \ - PIN_AFIO_AF(GPIOA_PIN5, 5) | \ - PIN_AFIO_AF(GPIOA_PIN6, 5) | \ - PIN_AFIO_AF(GPIOA_PIN7, 5)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ - PIN_AFIO_AF(GPIOA_PIN9, 0) | \ - PIN_AFIO_AF(GPIOA_PIN10, 0) | \ - PIN_AFIO_AF(GPIOA_USB_DM, 14) | \ - PIN_AFIO_AF(GPIOA_USB_DP, 14) | \ - PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ - PIN_AFIO_AF(GPIOA_SWCLK, 0) | \ - PIN_AFIO_AF(GPIOA_PIN15, 0)) - -/* - * GPIOB setup: - * - * PB0 - PIN0 (input pullup). - * PB1 - PIN1 (input pullup). - * PB2 - PIN2 (input pullup). - * PB3 - PIN3 (alternate 0). - * PB4 - PIN4 (input pullup). - * PB5 - PIN5 (input pullup). - * PB6 - PIN6 LSM303DLHC_SCL (alternate 4). - * PB7 - PIN7 LSM303DLHC_SDA (alternate 4). - * PB8 - PIN8 (input pullup). - * PB9 - PIN9 (input pullup). - * PB10 - PIN10 (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ - PIN_MODE_INPUT(GPIOB_PIN1) | \ - PIN_MODE_INPUT(GPIOB_PIN2) | \ - PIN_MODE_ALTERNATE(GPIOB_PIN3) | \ - PIN_MODE_INPUT(GPIOB_PIN4) | \ - PIN_MODE_INPUT(GPIOB_PIN5) | \ - PIN_MODE_ALTERNATE(GPIOB_PIN6) | \ - PIN_MODE_OUTPUT(GPIOB_PIN7) | \ - PIN_MODE_INPUT(GPIOB_PIN8) | \ - PIN_MODE_INPUT(GPIOB_PIN9) | \ - PIN_MODE_INPUT(GPIOB_PIN10) | \ - PIN_MODE_INPUT(GPIOB_PIN11) | \ - PIN_MODE_INPUT(GPIOB_PIN12) | \ - PIN_MODE_INPUT(GPIOB_PIN13) | \ - PIN_MODE_INPUT(GPIOB_PIN14) | \ - PIN_MODE_INPUT(GPIOB_PIN15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ - PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \ - PIN_OSPEED_HIGH(GPIOB_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ - PIN_OSPEED_HIGH(GPIOB_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN6) | \ - PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ - PIN_ODR_HIGH(GPIOB_PIN1) | \ - PIN_ODR_HIGH(GPIOB_PIN2) | \ - PIN_ODR_HIGH(GPIOB_PIN3) | \ - PIN_ODR_HIGH(GPIOB_PIN4) | \ - PIN_ODR_HIGH(GPIOB_PIN5) | \ - PIN_ODR_HIGH(GPIOB_PIN6) | \ - PIN_ODR_LOW(GPIOB_PIN7) | \ - PIN_ODR_HIGH(GPIOB_PIN8) | \ - PIN_ODR_HIGH(GPIOB_PIN9) | \ - PIN_ODR_HIGH(GPIOB_PIN10) | \ - PIN_ODR_HIGH(GPIOB_PIN11) | \ - PIN_ODR_HIGH(GPIOB_PIN12) | \ - PIN_ODR_HIGH(GPIOB_PIN13) | \ - PIN_ODR_HIGH(GPIOB_PIN14) | \ - PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \ - PIN_AFIO_AF(GPIOB_PIN1, 0) | \ - PIN_AFIO_AF(GPIOB_PIN2, 0) | \ - PIN_AFIO_AF(GPIOB_PIN3, 0) | \ - PIN_AFIO_AF(GPIOB_PIN4, 0) | \ - PIN_AFIO_AF(GPIOB_PIN5, 0) | \ - PIN_AFIO_AF(GPIOB_PIN6, 4) | \ - PIN_AFIO_AF(GPIOB_PIN7, 0)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \ - PIN_AFIO_AF(GPIOB_PIN9, 0) | \ - PIN_AFIO_AF(GPIOB_PIN10, 0) | \ - PIN_AFIO_AF(GPIOB_PIN11, 0) | \ - PIN_AFIO_AF(GPIOB_PIN12, 0) | \ - PIN_AFIO_AF(GPIOB_PIN13, 0) | \ - PIN_AFIO_AF(GPIOB_PIN14, 0) | \ - PIN_AFIO_AF(GPIOB_PIN15, 0)) - -/* - * GPIOC setup: - * - * PC0 - PIN0 (input pullup). - * PC1 - PIN1 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - PIN3 (input pullup). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - PIN6 (input pullup). - * PC7 - PIN7 (input pullup). - * PC8 - PIN8 (input pullup). - * PC9 - PIN9 (input pullup). - * PC10 - PIN10 (input pullup). - * PC11 - PIN11 (input pullup). - * PC12 - PIN12 (input pullup). - * PC13 - PIN13 (input pullup). - * PC14 - PIN14 (input floating). - * PC15 - PIN15 (input floating). - */ -#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ - PIN_MODE_INPUT(GPIOC_PIN1) | \ - PIN_MODE_INPUT(GPIOC_PIN2) | \ - PIN_MODE_INPUT(GPIOC_PIN3) | \ - PIN_MODE_INPUT(GPIOC_PIN4) | \ - PIN_MODE_INPUT(GPIOC_PIN5) | \ - PIN_MODE_INPUT(GPIOC_PIN6) | \ - PIN_MODE_INPUT(GPIOC_PIN7) | \ - PIN_MODE_INPUT(GPIOC_PIN8) | \ - PIN_MODE_INPUT(GPIOC_PIN9) | \ - PIN_MODE_INPUT(GPIOC_PIN10) | \ - PIN_MODE_INPUT(GPIOC_PIN11) | \ - PIN_MODE_INPUT(GPIOC_PIN12) | \ - PIN_MODE_INPUT(GPIOC_PIN13) | \ - PIN_MODE_INPUT(GPIOC_PIN14) | \ - PIN_MODE_INPUT(GPIOC_PIN15)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \ - PIN_OSPEED_HIGH(GPIOC_PIN14) | \ - PIN_OSPEED_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN15)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ - PIN_ODR_HIGH(GPIOC_PIN1) | \ - PIN_ODR_HIGH(GPIOC_PIN2) | \ - PIN_ODR_HIGH(GPIOC_PIN3) | \ - PIN_ODR_HIGH(GPIOC_PIN4) | \ - PIN_ODR_HIGH(GPIOC_PIN5) | \ - PIN_ODR_HIGH(GPIOC_PIN6) | \ - PIN_ODR_HIGH(GPIOC_PIN7) | \ - PIN_ODR_HIGH(GPIOC_PIN8) | \ - PIN_ODR_HIGH(GPIOC_PIN9) | \ - PIN_ODR_HIGH(GPIOC_PIN10) | \ - PIN_ODR_HIGH(GPIOC_PIN11) | \ - PIN_ODR_HIGH(GPIOC_PIN12) | \ - PIN_ODR_HIGH(GPIOC_PIN13) | \ - PIN_ODR_HIGH(GPIOC_PIN14) | \ - PIN_ODR_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \ - PIN_AFIO_AF(GPIOC_PIN1, 0) | \ - PIN_AFIO_AF(GPIOC_PIN2, 0) | \ - PIN_AFIO_AF(GPIOC_PIN3, 0) | \ - PIN_AFIO_AF(GPIOC_PIN4, 0) | \ - PIN_AFIO_AF(GPIOC_PIN5, 0) | \ - PIN_AFIO_AF(GPIOC_PIN6, 0) | \ - PIN_AFIO_AF(GPIOC_PIN7, 0)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \ - PIN_AFIO_AF(GPIOC_PIN9, 0) | \ - PIN_AFIO_AF(GPIOC_PIN10, 0) | \ - PIN_AFIO_AF(GPIOC_PIN11, 0) | \ - PIN_AFIO_AF(GPIOC_PIN12, 0) | \ - PIN_AFIO_AF(GPIOC_PIN13, 0) | \ - PIN_AFIO_AF(GPIOC_PIN14, 0) | \ - PIN_AFIO_AF(GPIOC_PIN15, 0)) - -/* - * GPIOD setup: - * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - PIN4 (input pullup). - * PD5 - PIN5 (input pullup). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD11 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - PIN12 (input pullup). - * PD13 - PIN13 (input pullup). - * PD14 - PIN14 (input pullup). - * PD15 - PIN15 (input pullup). - */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ - PIN_MODE_INPUT(GPIOD_PIN1) | \ - PIN_MODE_INPUT(GPIOD_PIN2) | \ - PIN_MODE_INPUT(GPIOD_PIN3) | \ - PIN_MODE_INPUT(GPIOD_PIN4) | \ - PIN_MODE_INPUT(GPIOD_PIN5) | \ - PIN_MODE_INPUT(GPIOD_PIN6) | \ - PIN_MODE_INPUT(GPIOD_PIN7) | \ - PIN_MODE_INPUT(GPIOD_PIN8) | \ - PIN_MODE_INPUT(GPIOD_PIN9) | \ - PIN_MODE_INPUT(GPIOD_PIN10) | \ - PIN_MODE_INPUT(GPIOD_PIN11) | \ - PIN_MODE_INPUT(GPIOD_PIN12) | \ - PIN_MODE_INPUT(GPIOD_PIN13) | \ - PIN_MODE_INPUT(GPIOD_PIN14) | \ - PIN_MODE_INPUT(GPIOD_PIN15)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN15)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN15)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ - PIN_ODR_HIGH(GPIOD_PIN1) | \ - PIN_ODR_HIGH(GPIOD_PIN2) | \ - PIN_ODR_HIGH(GPIOD_PIN3) | \ - PIN_ODR_HIGH(GPIOD_PIN4) | \ - PIN_ODR_HIGH(GPIOD_PIN5) | \ - PIN_ODR_HIGH(GPIOD_PIN6) | \ - PIN_ODR_HIGH(GPIOD_PIN7) | \ - PIN_ODR_HIGH(GPIOD_PIN8) | \ - PIN_ODR_HIGH(GPIOD_PIN9) | \ - PIN_ODR_HIGH(GPIOD_PIN10) | \ - PIN_ODR_HIGH(GPIOD_PIN11) | \ - PIN_ODR_HIGH(GPIOD_PIN12) | \ - PIN_ODR_HIGH(GPIOD_PIN13) | \ - PIN_ODR_HIGH(GPIOD_PIN14) | \ - PIN_ODR_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \ - PIN_AFIO_AF(GPIOD_PIN1, 0) | \ - PIN_AFIO_AF(GPIOD_PIN2, 0) | \ - PIN_AFIO_AF(GPIOD_PIN3, 0) | \ - PIN_AFIO_AF(GPIOD_PIN4, 0) | \ - PIN_AFIO_AF(GPIOD_PIN5, 0) | \ - PIN_AFIO_AF(GPIOD_PIN6, 0) | \ - PIN_AFIO_AF(GPIOD_PIN7, 0)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \ - PIN_AFIO_AF(GPIOD_PIN9, 0) | \ - PIN_AFIO_AF(GPIOD_PIN10, 0) | \ - PIN_AFIO_AF(GPIOD_PIN11, 0) | \ - PIN_AFIO_AF(GPIOD_PIN12, 0) | \ - PIN_AFIO_AF(GPIOD_PIN13, 0) | \ - PIN_AFIO_AF(GPIOD_PIN14, 0) | \ - PIN_AFIO_AF(GPIOD_PIN15, 0)) - -/* - * GPIOE setup: - * - * PE0 - PIN0 (input pullup). - * PE1 - PIN1 (input pullup). - * PE2 - PIN2 (input pullup). - * PE3 - PIN3 L3GD20_CS (output pushpull maximum). - * PE4 - PIN4 (input pullup). - * PE5 - PIN5 (input pullup). - * PE6 - PIN6 (input pullup). - * PE7 - PIN7 (input pullup). - * PE8 - PIN8 (output pushpull maximum). - * PE9 - PIN9 (output pushpull maximum). - * PE10 - PIN10 (output pushpull maximum). - * PE11 - PIN11 (output pushpull maximum). - * PE12 - PIN12 (output pushpull maximum). - * PE13 - PIN13 (output pushpull maximum). - * PE14 - PIN14 (output pushpull maximum). - * PE15 - PIN15 (output pushpull maximum). - */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ - PIN_MODE_INPUT(GPIOE_PIN1) | \ - PIN_MODE_INPUT(GPIOE_PIN2) |\ - PIN_MODE_OUTPUT(GPIOE_PIN3) | \ - PIN_MODE_INPUT(GPIOE_PIN4) |\ - PIN_MODE_INPUT(GPIOE_PIN5) |\ - PIN_MODE_INPUT(GPIOE_PIN6) | \ - PIN_MODE_INPUT(GPIOE_PIN7) | \ - PIN_MODE_OUTPUT(GPIOE_PIN8) | \ - PIN_MODE_OUTPUT(GPIOE_PIN9) | \ - PIN_MODE_OUTPUT(GPIOE_PIN10) | \ - PIN_MODE_OUTPUT(GPIOE_PIN11) | \ - PIN_MODE_OUTPUT(GPIOE_PIN12) | \ - PIN_MODE_OUTPUT(GPIOE_PIN13) | \ - PIN_MODE_OUTPUT(GPIOE_PIN14) | \ - PIN_MODE_OUTPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN1) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN2) |\ - PIN_OSPEED_HIGH(GPIOE_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOE_PIN4) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN5) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \ - PIN_OSPEED_HIGH(GPIOE_PIN8) | \ - PIN_OSPEED_HIGH(GPIOE_PIN9) | \ - PIN_OSPEED_HIGH(GPIOE_PIN10) | \ - PIN_OSPEED_HIGH(GPIOE_PIN11) | \ - PIN_OSPEED_HIGH(GPIOE_PIN12) | \ - PIN_OSPEED_HIGH(GPIOE_PIN13) | \ - PIN_OSPEED_HIGH(GPIOE_PIN14) | \ - PIN_OSPEED_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN2) |\ - PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN4) |\ - PIN_PUPDR_PULLUP(GPIOE_PIN5) |\ - PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN14) |\ - PIN_PUPDR_FLOATING(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ - PIN_ODR_HIGH(GPIOE_PIN1) | \ - PIN_ODR_HIGH(GPIOE_PIN2) | \ - PIN_ODR_HIGH(GPIOE_PIN3) | \ - PIN_ODR_HIGH(GPIOE_PIN4) | \ - PIN_ODR_HIGH(GPIOE_PIN5) | \ - PIN_ODR_HIGH(GPIOE_PIN6) | \ - PIN_ODR_HIGH(GPIOE_PIN7) | \ - PIN_ODR_LOW(GPIOE_PIN8) | \ - PIN_ODR_LOW(GPIOE_PIN9) | \ - PIN_ODR_LOW(GPIOE_PIN10) | \ - PIN_ODR_LOW(GPIOE_PIN11) | \ - PIN_ODR_LOW(GPIOE_PIN12) | \ - PIN_ODR_LOW(GPIOE_PIN13) | \ - PIN_ODR_LOW(GPIOE_PIN14) | \ - PIN_ODR_LOW(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \ - PIN_AFIO_AF(GPIOE_PIN1, 0) | \ - PIN_AFIO_AF(GPIOE_PIN2, 0) |\ - PIN_AFIO_AF(GPIOE_PIN3, 0) | \ - PIN_AFIO_AF(GPIOE_PIN4, 0) |\ - PIN_AFIO_AF(GPIOE_PIN5, 0) |\ - PIN_AFIO_AF(GPIOE_PIN6, 0) | \ - PIN_AFIO_AF(GPIOE_PIN7, 0)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \ - PIN_AFIO_AF(GPIOE_PIN9, 0) | \ - PIN_AFIO_AF(GPIOE_PIN10, 0) | \ - PIN_AFIO_AF(GPIOE_PIN11, 0) | \ - PIN_AFIO_AF(GPIOE_PIN12, 0) | \ - PIN_AFIO_AF(GPIOE_PIN13, 0) | \ - PIN_AFIO_AF(GPIOE_PIN14, 0) | \ - PIN_AFIO_AF(GPIOE_PIN15, 0)) - -/* - * GPIOF setup: - * - * PF0 - I2C2_SDA (input floating). - * PF1 - I2C2_SCL (input floating). - * PF2 - PIN2 (input pullup). - * PF3 - PIN3 (input pullup). - * PF4 - PIN4 (input pullup). - * PF5 - PIN5 (input pullup). - * PF6 - PIN6 (input pullup). - * PF7 - PIN7 (input pullup). - * PF8 - PIN8 (input pullup). - * PF9 - PIN9 (input pullup). - * PF10 - PIN10 (input pullup). - * PF11 - PIN11 (input pullup). - * PF12 - PIN12 (input pullup). - * PF13 - PIN13 (input pullup). - * PF14 - PIN14 (input pullup). - * PF15 - PIN15 (input pullup). - */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | \ - PIN_MODE_INPUT(GPIOF_I2C2_SCL) | \ - PIN_MODE_INPUT(GPIOF_PIN2) | \ - PIN_MODE_INPUT(GPIOF_PIN3) | \ - PIN_MODE_INPUT(GPIOF_PIN4) | \ - PIN_MODE_INPUT(GPIOF_PIN5) | \ - PIN_MODE_INPUT(GPIOF_PIN6) | \ - PIN_MODE_INPUT(GPIOF_PIN7) | \ - PIN_MODE_INPUT(GPIOF_PIN8) | \ - PIN_MODE_INPUT(GPIOF_PIN9) | \ - PIN_MODE_INPUT(GPIOF_PIN10) | \ - PIN_MODE_INPUT(GPIOF_PIN11) | \ - PIN_MODE_INPUT(GPIOF_PIN12) | \ - PIN_MODE_INPUT(GPIOF_PIN13) | \ - PIN_MODE_INPUT(GPIOF_PIN14) | \ - PIN_MODE_INPUT(GPIOF_PIN15)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | \ - PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | \ - PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | \ - PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN15)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | \ - PIN_ODR_HIGH(GPIOF_I2C2_SCL) | \ - PIN_ODR_HIGH(GPIOF_PIN2) | \ - PIN_ODR_HIGH(GPIOF_PIN3) | \ - PIN_ODR_HIGH(GPIOF_PIN4) | \ - PIN_ODR_HIGH(GPIOF_PIN5) | \ - PIN_ODR_HIGH(GPIOF_PIN6) | \ - PIN_ODR_HIGH(GPIOF_PIN7) | \ - PIN_ODR_HIGH(GPIOF_PIN8) | \ - PIN_ODR_HIGH(GPIOF_PIN9) | \ - PIN_ODR_HIGH(GPIOF_PIN10) | \ - PIN_ODR_HIGH(GPIOF_PIN11) | \ - PIN_ODR_HIGH(GPIOF_PIN12) | \ - PIN_ODR_HIGH(GPIOF_PIN13) | \ - PIN_ODR_HIGH(GPIOF_PIN14) | \ - PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | \ - PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | \ - PIN_AFIO_AF(GPIOF_PIN2, 0) | \ - PIN_AFIO_AF(GPIOF_PIN3, 0) | \ - PIN_AFIO_AF(GPIOF_PIN4, 0) | \ - PIN_AFIO_AF(GPIOF_PIN5, 0) | \ - PIN_AFIO_AF(GPIOF_PIN6, 0) | \ - PIN_AFIO_AF(GPIOF_PIN7, 0)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \ - PIN_AFIO_AF(GPIOF_PIN9, 0) | \ - PIN_AFIO_AF(GPIOF_PIN10, 0) | \ - PIN_AFIO_AF(GPIOF_PIN11, 0) | \ - PIN_AFIO_AF(GPIOF_PIN12, 0) | \ - PIN_AFIO_AF(GPIOF_PIN13, 0) | \ - PIN_AFIO_AF(GPIOF_PIN14, 0) | \ - PIN_AFIO_AF(GPIOF_PIN15, 0)) - -/* - * GPIOG setup: - * - * PG0 - PIN0 (input pullup). - * PG1 - PIN1 (input pullup). - * PG2 - PIN2 (input pullup). - * PG3 - PIN3 (input pullup). - * PG4 - PIN4 (input pullup). - * PG5 - PIN5 (input pullup). - * PG6 - PIN6 (input pullup). - * PG7 - PIN7 (input pullup). - * PG8 - PIN8 (input pullup). - * PG9 - PIN9 (input pullup). - * PG10 - PIN10 (input pullup). - * PG11 - PIN11 (input pullup). - * PG12 - PIN12 (input pullup). - * PG13 - PIN13 (input pullup). - * PG14 - PIN14 (input pullup). - * PG15 - PIN15 (input pullup). - */ -#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ - PIN_MODE_INPUT(GPIOG_PIN1) | \ - PIN_MODE_INPUT(GPIOG_PIN2) | \ - PIN_MODE_INPUT(GPIOG_PIN3) | \ - PIN_MODE_INPUT(GPIOG_PIN4) | \ - PIN_MODE_INPUT(GPIOG_PIN5) | \ - PIN_MODE_INPUT(GPIOG_PIN6) | \ - PIN_MODE_INPUT(GPIOG_PIN7) | \ - PIN_MODE_INPUT(GPIOG_PIN8) | \ - PIN_MODE_INPUT(GPIOG_PIN9) | \ - PIN_MODE_INPUT(GPIOG_PIN10) | \ - PIN_MODE_INPUT(GPIOG_PIN11) | \ - PIN_MODE_INPUT(GPIOG_PIN12) | \ - PIN_MODE_INPUT(GPIOG_PIN13) | \ - PIN_MODE_INPUT(GPIOG_PIN14) | \ - PIN_MODE_INPUT(GPIOG_PIN15)) -#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) -#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN15)) -#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN15)) -#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ - PIN_ODR_HIGH(GPIOG_PIN1) | \ - PIN_ODR_HIGH(GPIOG_PIN2) | \ - PIN_ODR_HIGH(GPIOG_PIN3) | \ - PIN_ODR_HIGH(GPIOG_PIN4) | \ - PIN_ODR_HIGH(GPIOG_PIN5) | \ - PIN_ODR_HIGH(GPIOG_PIN6) | \ - PIN_ODR_HIGH(GPIOG_PIN7) | \ - PIN_ODR_HIGH(GPIOG_PIN8) | \ - PIN_ODR_HIGH(GPIOG_PIN9) | \ - PIN_ODR_HIGH(GPIOG_PIN10) | \ - PIN_ODR_HIGH(GPIOG_PIN11) | \ - PIN_ODR_HIGH(GPIOG_PIN12) | \ - PIN_ODR_HIGH(GPIOG_PIN13) | \ - PIN_ODR_HIGH(GPIOG_PIN14) | \ - PIN_ODR_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \ - PIN_AFIO_AF(GPIOG_PIN1, 0) | \ - PIN_AFIO_AF(GPIOG_PIN2, 0) | \ - PIN_AFIO_AF(GPIOG_PIN3, 0) | \ - PIN_AFIO_AF(GPIOG_PIN4, 0) | \ - PIN_AFIO_AF(GPIOG_PIN5, 0) | \ - PIN_AFIO_AF(GPIOG_PIN6, 0) | \ - PIN_AFIO_AF(GPIOG_PIN7, 0)) -#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \ - PIN_AFIO_AF(GPIOG_PIN9, 0) | \ - PIN_AFIO_AF(GPIOG_PIN10, 0) | \ - PIN_AFIO_AF(GPIOG_PIN11, 0) | \ - PIN_AFIO_AF(GPIOG_PIN12, 0) | \ - PIN_AFIO_AF(GPIOG_PIN13, 0) | \ - PIN_AFIO_AF(GPIOG_PIN14, 0) | \ - PIN_AFIO_AF(GPIOG_PIN15, 0)) - -/* - * GPIOH setup: - * - * PH0 - PIN0 (input pullup). - * PH1 - PIN1 (input pullup). - * PH2 - PIN2 (input pullup). - * PH3 - PIN3 (input pullup). - * PH4 - PIN4 (input pullup). - * PH5 - PIN5 (input pullup). - * PH6 - PIN6 (input pullup). - * PH7 - PIN7 (input pullup). - * PH8 - PIN8 (input pullup). - * PH9 - PIN9 (input pullup). - * PH10 - PIN10 (input pullup). - * PH11 - PIN11 (input pullup). - * PH12 - PIN12 (input pullup). - * PH13 - PIN13 (input pullup). - * PH14 - PIN14 (input pullup). - * PH15 - PIN15 (input pullup). - */ -#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \ - PIN_MODE_INPUT(GPIOH_PIN1) | \ - PIN_MODE_INPUT(GPIOH_PIN2) | \ - PIN_MODE_INPUT(GPIOH_PIN3) | \ - PIN_MODE_INPUT(GPIOH_PIN4) | \ - PIN_MODE_INPUT(GPIOH_PIN5) | \ - PIN_MODE_INPUT(GPIOH_PIN6) | \ - PIN_MODE_INPUT(GPIOH_PIN7) | \ - PIN_MODE_INPUT(GPIOH_PIN8) | \ - PIN_MODE_INPUT(GPIOH_PIN9) | \ - PIN_MODE_INPUT(GPIOH_PIN10) | \ - PIN_MODE_INPUT(GPIOH_PIN11) | \ - PIN_MODE_INPUT(GPIOH_PIN12) | \ - PIN_MODE_INPUT(GPIOH_PIN13) | \ - PIN_MODE_INPUT(GPIOH_PIN14) | \ - PIN_MODE_INPUT(GPIOH_PIN15)) -#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) -#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN15)) -#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN15)) -#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \ - PIN_ODR_HIGH(GPIOH_PIN1) | \ - PIN_ODR_HIGH(GPIOH_PIN2) | \ - PIN_ODR_HIGH(GPIOH_PIN3) | \ - PIN_ODR_HIGH(GPIOH_PIN4) | \ - PIN_ODR_HIGH(GPIOH_PIN5) | \ - PIN_ODR_HIGH(GPIOH_PIN6) | \ - PIN_ODR_HIGH(GPIOH_PIN7) | \ - PIN_ODR_HIGH(GPIOH_PIN8) | \ - PIN_ODR_HIGH(GPIOH_PIN9) | \ - PIN_ODR_HIGH(GPIOH_PIN10) | \ - PIN_ODR_HIGH(GPIOH_PIN11) | \ - PIN_ODR_HIGH(GPIOH_PIN12) | \ - PIN_ODR_HIGH(GPIOH_PIN13) | \ - PIN_ODR_HIGH(GPIOH_PIN14) | \ - PIN_ODR_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | \ - PIN_AFIO_AF(GPIOH_PIN1, 0) | \ - PIN_AFIO_AF(GPIOH_PIN2, 0) | \ - PIN_AFIO_AF(GPIOH_PIN3, 0) | \ - PIN_AFIO_AF(GPIOH_PIN4, 0) | \ - PIN_AFIO_AF(GPIOH_PIN5, 0) | \ - PIN_AFIO_AF(GPIOH_PIN6, 0) | \ - PIN_AFIO_AF(GPIOH_PIN7, 0)) -#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \ - PIN_AFIO_AF(GPIOH_PIN9, 0) | \ - PIN_AFIO_AF(GPIOH_PIN10, 0) | \ - PIN_AFIO_AF(GPIOH_PIN11, 0) | \ - PIN_AFIO_AF(GPIOH_PIN12, 0) | \ - PIN_AFIO_AF(GPIOH_PIN13, 0) | \ - PIN_AFIO_AF(GPIOH_PIN14, 0) | \ - PIN_AFIO_AF(GPIOH_PIN15, 0)) - - -/* - * USB bus activation macro, required by the USB driver. - */ -// #define usb_lld_connect_bus(usbp) -#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14))) -// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT) -/* - * USB bus de-activation macro, required by the USB driver. - */ -// #define usb_lld_disconnect_bus(usbp) -#define usb_lld_disconnect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); palClearPad(GPIOA, GPIOA_USB_DP) -// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12) - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk deleted file mode 100644 index 43377629a3..0000000000 --- a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC diff --git a/keyboards/hadron/ver3/bootloader_defs.h b/keyboards/hadron/ver3/bootloader_defs.h deleted file mode 100644 index 3b0e9d20a6..0000000000 --- a/keyboards/hadron/ver3/bootloader_defs.h +++ /dev/null @@ -1,7 +0,0 @@ -/* Address for jumping to bootloader on STM32 chips. */ -/* It is chip dependent, the correct number can be looked up here: - * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf - * This also requires a patch to chibios: - * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch - */ -#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800 diff --git a/keyboards/hadron/ver3/rules.mk b/keyboards/hadron/ver3/rules.mk index 1345c67f28..8ce0d77b78 100644 --- a/keyboards/hadron/ver3/rules.mk +++ b/keyboards/hadron/ver3/rules.mk @@ -1,6 +1,4 @@ -# projecct specific files - -# Cortex version +# MCU name MCU = STM32F303 # Build Options diff --git a/keyboards/handwired/co60/rev6/rules.mk b/keyboards/handwired/co60/rev6/rules.mk index dba41e12be..fc7cabb108 100644 --- a/keyboards/handwired/co60/rev6/rules.mk +++ b/keyboards/handwired/co60/rev6/rules.mk @@ -1,40 +1,5 @@ -# project specific files - -## chip/board settings -# - the next two should match the directories in -# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) -MCU_FAMILY = STM32 -MCU_SERIES = STM32F3xx - -# Linker script to use -# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ -# or <this_dir>/ld/ -MCU_LDSCRIPT = STM32F303xC - -# Startup code to use -# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ -MCU_STARTUP = stm32f3xx - -# Board: it should exist either in <chibios>/os/hal/boards/ -# or <this_dir>/boards -BOARD = GENERIC_STM32_F303XC - -# Cortex version -MCU = cortex-m4 - -# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 -ARMV = 7 - -USE_FPU = yes - -# Vector table for application -# 0x00000000-0x00001000 area is occupied by bootlaoder.*/ -# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB -# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 - -# Options to pass to dfu-util when flashing -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -v 0483 -p df11 +# MCU name +MCU = STM32F303 # Code for backlight breathing: SRC += led.c diff --git a/keyboards/handwired/co60/rev7/rules.mk b/keyboards/handwired/co60/rev7/rules.mk index 6e0b3856ab..9daeaf047a 100644 --- a/keyboards/handwired/co60/rev7/rules.mk +++ b/keyboards/handwired/co60/rev7/rules.mk @@ -1,40 +1,5 @@ -# project specific files - -## chip/board settings -# - the next two should match the directories in -# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) -MCU_FAMILY = STM32 -MCU_SERIES = STM32F3xx - -# Linker script to use -# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ -# or <this_dir>/ld/ -MCU_LDSCRIPT = STM32F303xC - -# Startup code to use -# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ -MCU_STARTUP = stm32f3xx - -# Board: it should exist either in <chibios>/os/hal/boards/ -# or <this_dir>/boards -BOARD = GENERIC_STM32_F303XC - -# Cortex version -MCU = cortex-m4 - -# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 -ARMV = 7 - -USE_FPU = yes - -# Vector table for application -# 0x00000000-0x00001000 area is occupied by bootlaoder.*/ -# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB -# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 - -# Options to pass to dfu-util when flashing -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -v 0483 -p df11 +# MCU name +MCU = STM32F303 # Code for backlight breathing: SRC += led.c diff --git a/keyboards/handwired/steamvan/rev1/rules.mk b/keyboards/handwired/steamvan/rev1/rules.mk index 3a91a7c609..471cb4c1e1 100644 --- a/keyboards/handwired/steamvan/rev1/rules.mk +++ b/keyboards/handwired/steamvan/rev1/rules.mk @@ -1,40 +1,5 @@ -# project specific files - -## chip/board settings -# - the next two should match the directories in -# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) -MCU_FAMILY = STM32 -MCU_SERIES = STM32F3xx - -# Linker script to use -# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ -# or <this_dir>/ld/ -MCU_LDSCRIPT = STM32F303xC - -# Startup code to use -# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ -MCU_STARTUP = stm32f3xx - -# Board: it should exist either in <chibios>/os/hal/boards/ -# or <this_dir>/boards -BOARD = GENERIC_STM32_F303XC - -# Cortex version -MCU = cortex-m4 - -# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 -ARMV = 7 - -USE_FPU = yes - -# Vector table for application -# 0x00000000-0x00001000 area is occupied by bootlaoder.*/ -# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB -# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 - -# Options to pass to dfu-util when flashing -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -v 0483 -p df11 +# MCU name +MCU = STM32F303 # Code for backlight breathing: SRC += led.c diff --git a/keyboards/handwired/wulkan/rules.mk b/keyboards/handwired/wulkan/rules.mk index 3f881b7f12..f432c7d673 100644 --- a/keyboards/handwired/wulkan/rules.mk +++ b/keyboards/handwired/wulkan/rules.mk @@ -1,3 +1,4 @@ +# MCU name MCU = STM32F303 # Build Options diff --git a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.c b/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.c deleted file mode 100644 index 4331155df4..0000000000 --- a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -#if HAL_USE_PAL || defined(__DOXYGEN__) -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -const PALConfig pal_default_config = { -#if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, -#endif -#if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, -#endif -#if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, -#endif -#if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, -#endif -#if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, -#endif -#if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, -#endif -#if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, -#endif -#if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, -#endif -#if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} -#endif -}; -#endif - -void enter_bootloader_mode_if_requested(void); - -/** - * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. - */ -void __early_init(void) { - enter_bootloader_mode_if_requested(); - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief SDC card write protection detection. - */ -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) { -} diff --git a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.h b/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.h deleted file mode 100644 index fb7283add9..0000000000 --- a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.h +++ /dev/null @@ -1,1187 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for Clueboard 60% Keyboard - */ - -/* - * Board identifier. - */ -#define BOARD_GENERIC_STM32_F303XC -#define BOARD_NAME "HS60 V2.0 PCB" - -/* - * Board oscillators-related settings. - * NOTE: LSE not fitted. - */ -#if !defined(STM32_LSECLK) -#define STM32_LSECLK 0U -#endif - -#define STM32_LSEDRV (3U << 3U) - -#if !defined(STM32_HSECLK) -#define STM32_HSECLK 8000000U -#endif - -// #define STM32_HSE_BYPASS - -/* - * MCU type as defined in the ST header. - */ -#define STM32F303xC - -/* - * IO pins assignments. - */ -#define GPIOA_PIN0 0U -#define GPIOA_PIN1 1U -#define GPIOA_PIN2 2U -#define GPIOA_PIN3 3U -#define GPIOA_PIN4 4U -#define GPIOA_PIN5 5U -#define GPIOA_PIN6 6U -#define GPIOA_PIN7 7U -#define GPIOA_PIN8 8U -#define GPIOA_PIN9 9U -#define GPIOA_PIN10 10U -#define GPIOA_USB_DM 11U -#define GPIOA_USB_DP 12U -#define GPIOA_SWDIO 13U -#define GPIOA_SWCLK 14U -#define GPIOA_PIN15 15U - -#define GPIOB_PIN0 0U -#define GPIOB_PIN1 1U -#define GPIOB_PIN2 2U -#define GPIOB_PIN3 3U -#define GPIOB_PIN4 4U -#define GPIOB_PIN5 5U -#define GPIOB_PIN6 6U -#define GPIOB_PIN7 7U -#define GPIOB_PIN8 8U -#define GPIOB_PIN9 9U -#define GPIOB_PIN10 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_PIN13 13U -#define GPIOB_PIN14 14U -#define GPIOB_PIN15 15U - -#define GPIOC_PIN0 0U -#define GPIOC_PIN1 1U -#define GPIOC_PIN2 2U -#define GPIOC_PIN3 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_PIN6 6U -#define GPIOC_PIN7 7U -#define GPIOC_PIN8 8U -#define GPIOC_PIN9 9U -#define GPIOC_PIN10 10U -#define GPIOC_PIN11 11U -#define GPIOC_PIN12 12U -#define GPIOC_PIN13 13U -#define GPIOC_PIN14 14U -#define GPIOC_PIN15 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_PIN4 4U -#define GPIOD_PIN5 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_PIN12 12U -#define GPIOD_PIN13 13U -#define GPIOD_PIN14 14U -#define GPIOD_PIN15 15U - -#define GPIOE_PIN0 0U -#define GPIOE_PIN1 1U -#define GPIOE_PIN2 2U -#define GPIOE_PIN3 3U -#define GPIOE_PIN4 4U -#define GPIOE_PIN5 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_I2C2_SDA 0U -#define GPIOF_I2C2_SCL 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -#define GPIOG_PIN0 0U -#define GPIOG_PIN1 1U -#define GPIOG_PIN2 2U -#define GPIOG_PIN3 3U -#define GPIOG_PIN4 4U -#define GPIOG_PIN5 5U -#define GPIOG_PIN6 6U -#define GPIOG_PIN7 7U -#define GPIOG_PIN8 8U -#define GPIOG_PIN9 9U -#define GPIOG_PIN10 10U -#define GPIOG_PIN11 11U -#define GPIOG_PIN12 12U -#define GPIOG_PIN13 13U -#define GPIOG_PIN14 14U -#define GPIOG_PIN15 15U - -#define GPIOH_PIN0 0U -#define GPIOH_PIN1 1U -#define GPIOH_PIN2 2U -#define GPIOH_PIN3 3U -#define GPIOH_PIN4 4U -#define GPIOH_PIN5 5U -#define GPIOH_PIN6 6U -#define GPIOH_PIN7 7U -#define GPIOH_PIN8 8U -#define GPIOH_PIN9 9U -#define GPIOH_PIN10 10U -#define GPIOH_PIN11 11U -#define GPIOH_PIN12 12U -#define GPIOH_PIN13 13U -#define GPIOH_PIN14 14U -#define GPIOH_PIN15 15U - -/* - * IO lines assignments. - */ -#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U) -#define LINE_USB_DM PAL_LINE(GPIOA, 11U) -#define LINE_USB_DP PAL_LINE(GPIOA, 12U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) - -#define LINE_PIN6 PAL_LINE(GPIOF, 0U) -#define LINE_PIN7 PAL_LINE(GPIOF, 1U) - -#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U) - - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) - -/* - * GPIOA setup: - * - * PA0 - NC - * PA1 - NC - * PA2 - COL1 - * PA3 - COL2 - * PA4 - SPEAKER1 - * PA5 - SPEAKER2 - * PA6 - COL3 - * PA7 - COL8 - * PA8 - COL6 - * PA9 - COL7 - * PA10 - ROW5 - * PA11 - USB_DM (alternate 14). - * PA12 - USB_DP (alternate 14). - * PA13 - SWDIO (alternate 0). - * PA14 - SWCLK (alternate 0). - * PA15 - ROW4 - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \ - PIN_MODE_ALTERNATE(GPIOA_PIN1) | \ - PIN_MODE_INPUT(GPIOA_PIN2) | \ - PIN_MODE_INPUT(GPIOA_PIN3) | \ - PIN_MODE_INPUT(GPIOA_PIN4) | \ - PIN_MODE_INPUT(GPIOA_PIN5) | \ - PIN_MODE_INPUT(GPIOA_PIN6) | \ - PIN_MODE_INPUT(GPIOA_PIN7) | \ - PIN_MODE_INPUT(GPIOA_PIN8) | \ - PIN_MODE_INPUT(GPIOA_PIN9) | \ - PIN_MODE_INPUT(GPIOA_PIN10) | \ - PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \ - PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \ - PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ - PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ - PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \ - PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \ - PIN_OSPEED_HIGH(GPIOA_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \ - PIN_OSPEED_HIGH(GPIOA_USB_DM) | \ - PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \ - PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ - PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \ - PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \ - PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ - PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \ - PIN_ODR_HIGH(GPIOA_PIN1) | \ - PIN_ODR_HIGH(GPIOA_PIN2) | \ - PIN_ODR_HIGH(GPIOA_PIN3) | \ - PIN_ODR_HIGH(GPIOA_PIN4) | \ - PIN_ODR_HIGH(GPIOA_PIN5) | \ - PIN_ODR_HIGH(GPIOA_PIN6) | \ - PIN_ODR_HIGH(GPIOA_PIN7) | \ - PIN_ODR_HIGH(GPIOA_PIN8) | \ - PIN_ODR_HIGH(GPIOA_PIN9) | \ - PIN_ODR_HIGH(GPIOA_PIN10) | \ - PIN_ODR_HIGH(GPIOA_USB_DM) | \ - PIN_ODR_HIGH(GPIOA_USB_DP) | \ - PIN_ODR_HIGH(GPIOA_SWDIO) | \ - PIN_ODR_HIGH(GPIOA_SWCLK) | \ - PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \ - PIN_AFIO_AF(GPIOA_PIN1, 1) | \ - PIN_AFIO_AF(GPIOA_PIN2, 0) | \ - PIN_AFIO_AF(GPIOA_PIN3, 0) | \ - PIN_AFIO_AF(GPIOA_PIN4, 0) | \ - PIN_AFIO_AF(GPIOA_PIN5, 5) | \ - PIN_AFIO_AF(GPIOA_PIN6, 5) | \ - PIN_AFIO_AF(GPIOA_PIN7, 5)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ - PIN_AFIO_AF(GPIOA_PIN9, 0) | \ - PIN_AFIO_AF(GPIOA_PIN10, 0) | \ - PIN_AFIO_AF(GPIOA_USB_DM, 14) | \ - PIN_AFIO_AF(GPIOA_USB_DP, 14) | \ - PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ - PIN_AFIO_AF(GPIOA_SWCLK, 0) | \ - PIN_AFIO_AF(GPIOA_PIN15, 0)) - -/* - * GPIOB setup: - * - * PB0 - PIN0 (input pullup). - * PB1 - PIN1 (input pullup). - * PB2 - PIN2 (input pullup). - * PB3 - PIN3 (alternate 0). - * PB4 - PIN4 (input pullup). - * PB5 - PIN5 (input pullup). - * PB6 - PIN6 LSM303DLHC_SCL (alternate 4). - * PB7 - PIN7 LSM303DLHC_SDA (alternate 4). - * PB8 - PIN8 (input pullup). - * PB9 - PIN9 (input pullup). - * PB10 - PIN10 (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ - PIN_MODE_INPUT(GPIOB_PIN1) | \ - PIN_MODE_INPUT(GPIOB_PIN2) | \ - PIN_MODE_ALTERNATE(GPIOB_PIN3) | \ - PIN_MODE_INPUT(GPIOB_PIN4) | \ - PIN_MODE_INPUT(GPIOB_PIN5) | \ - PIN_MODE_ALTERNATE(GPIOB_PIN6) | \ - PIN_MODE_OUTPUT(GPIOB_PIN7) | \ - PIN_MODE_INPUT(GPIOB_PIN8) | \ - PIN_MODE_INPUT(GPIOB_PIN9) | \ - PIN_MODE_INPUT(GPIOB_PIN10) | \ - PIN_MODE_INPUT(GPIOB_PIN11) | \ - PIN_MODE_INPUT(GPIOB_PIN12) | \ - PIN_MODE_INPUT(GPIOB_PIN13) | \ - PIN_MODE_INPUT(GPIOB_PIN14) | \ - PIN_MODE_INPUT(GPIOB_PIN15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ - PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \ - PIN_OSPEED_HIGH(GPIOB_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ - PIN_OSPEED_HIGH(GPIOB_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN6) | \ - PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ - PIN_ODR_HIGH(GPIOB_PIN1) | \ - PIN_ODR_HIGH(GPIOB_PIN2) | \ - PIN_ODR_HIGH(GPIOB_PIN3) | \ - PIN_ODR_HIGH(GPIOB_PIN4) | \ - PIN_ODR_HIGH(GPIOB_PIN5) | \ - PIN_ODR_HIGH(GPIOB_PIN6) | \ - PIN_ODR_LOW(GPIOB_PIN7) | \ - PIN_ODR_HIGH(GPIOB_PIN8) | \ - PIN_ODR_HIGH(GPIOB_PIN9) | \ - PIN_ODR_HIGH(GPIOB_PIN10) | \ - PIN_ODR_HIGH(GPIOB_PIN11) | \ - PIN_ODR_HIGH(GPIOB_PIN12) | \ - PIN_ODR_HIGH(GPIOB_PIN13) | \ - PIN_ODR_HIGH(GPIOB_PIN14) | \ - PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \ - PIN_AFIO_AF(GPIOB_PIN1, 0) | \ - PIN_AFIO_AF(GPIOB_PIN2, 0) | \ - PIN_AFIO_AF(GPIOB_PIN3, 0) | \ - PIN_AFIO_AF(GPIOB_PIN4, 0) | \ - PIN_AFIO_AF(GPIOB_PIN5, 0) | \ - PIN_AFIO_AF(GPIOB_PIN6, 4) | \ - PIN_AFIO_AF(GPIOB_PIN7, 0)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \ - PIN_AFIO_AF(GPIOB_PIN9, 0) | \ - PIN_AFIO_AF(GPIOB_PIN10, 0) | \ - PIN_AFIO_AF(GPIOB_PIN11, 0) | \ - PIN_AFIO_AF(GPIOB_PIN12, 0) | \ - PIN_AFIO_AF(GPIOB_PIN13, 0) | \ - PIN_AFIO_AF(GPIOB_PIN14, 0) | \ - PIN_AFIO_AF(GPIOB_PIN15, 0)) - -/* - * GPIOC setup: - * - * PC0 - PIN0 (input pullup). - * PC1 - PIN1 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - PIN3 (input pullup). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - PIN6 (input pullup). - * PC7 - PIN7 (input pullup). - * PC8 - PIN8 (input pullup). - * PC9 - PIN9 (input pullup). - * PC10 - PIN10 (input pullup). - * PC11 - PIN11 (input pullup). - * PC12 - PIN12 (input pullup). - * PC13 - PIN13 (input pullup). - * PC14 - PIN14 (input floating). - * PC15 - PIN15 (input floating). - */ -#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ - PIN_MODE_INPUT(GPIOC_PIN1) | \ - PIN_MODE_INPUT(GPIOC_PIN2) | \ - PIN_MODE_INPUT(GPIOC_PIN3) | \ - PIN_MODE_INPUT(GPIOC_PIN4) | \ - PIN_MODE_INPUT(GPIOC_PIN5) | \ - PIN_MODE_INPUT(GPIOC_PIN6) | \ - PIN_MODE_INPUT(GPIOC_PIN7) | \ - PIN_MODE_INPUT(GPIOC_PIN8) | \ - PIN_MODE_INPUT(GPIOC_PIN9) | \ - PIN_MODE_INPUT(GPIOC_PIN10) | \ - PIN_MODE_INPUT(GPIOC_PIN11) | \ - PIN_MODE_INPUT(GPIOC_PIN12) | \ - PIN_MODE_INPUT(GPIOC_PIN13) | \ - PIN_MODE_INPUT(GPIOC_PIN14) | \ - PIN_MODE_INPUT(GPIOC_PIN15)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \ - PIN_OSPEED_HIGH(GPIOC_PIN14) | \ - PIN_OSPEED_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN15)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ - PIN_ODR_HIGH(GPIOC_PIN1) | \ - PIN_ODR_HIGH(GPIOC_PIN2) | \ - PIN_ODR_HIGH(GPIOC_PIN3) | \ - PIN_ODR_HIGH(GPIOC_PIN4) | \ - PIN_ODR_HIGH(GPIOC_PIN5) | \ - PIN_ODR_HIGH(GPIOC_PIN6) | \ - PIN_ODR_HIGH(GPIOC_PIN7) | \ - PIN_ODR_HIGH(GPIOC_PIN8) | \ - PIN_ODR_HIGH(GPIOC_PIN9) | \ - PIN_ODR_HIGH(GPIOC_PIN10) | \ - PIN_ODR_HIGH(GPIOC_PIN11) | \ - PIN_ODR_HIGH(GPIOC_PIN12) | \ - PIN_ODR_HIGH(GPIOC_PIN13) | \ - PIN_ODR_HIGH(GPIOC_PIN14) | \ - PIN_ODR_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \ - PIN_AFIO_AF(GPIOC_PIN1, 0) | \ - PIN_AFIO_AF(GPIOC_PIN2, 0) | \ - PIN_AFIO_AF(GPIOC_PIN3, 0) | \ - PIN_AFIO_AF(GPIOC_PIN4, 0) | \ - PIN_AFIO_AF(GPIOC_PIN5, 0) | \ - PIN_AFIO_AF(GPIOC_PIN6, 0) | \ - PIN_AFIO_AF(GPIOC_PIN7, 0)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \ - PIN_AFIO_AF(GPIOC_PIN9, 0) | \ - PIN_AFIO_AF(GPIOC_PIN10, 0) | \ - PIN_AFIO_AF(GPIOC_PIN11, 0) | \ - PIN_AFIO_AF(GPIOC_PIN12, 0) | \ - PIN_AFIO_AF(GPIOC_PIN13, 0) | \ - PIN_AFIO_AF(GPIOC_PIN14, 0) | \ - PIN_AFIO_AF(GPIOC_PIN15, 0)) - -/* - * GPIOD setup: - * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - PIN4 (input pullup). - * PD5 - PIN5 (input pullup). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD11 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - PIN12 (input pullup). - * PD13 - PIN13 (input pullup). - * PD14 - PIN14 (input pullup). - * PD15 - PIN15 (input pullup). - */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ - PIN_MODE_INPUT(GPIOD_PIN1) | \ - PIN_MODE_INPUT(GPIOD_PIN2) | \ - PIN_MODE_INPUT(GPIOD_PIN3) | \ - PIN_MODE_INPUT(GPIOD_PIN4) | \ - PIN_MODE_INPUT(GPIOD_PIN5) | \ - PIN_MODE_INPUT(GPIOD_PIN6) | \ - PIN_MODE_INPUT(GPIOD_PIN7) | \ - PIN_MODE_INPUT(GPIOD_PIN8) | \ - PIN_MODE_INPUT(GPIOD_PIN9) | \ - PIN_MODE_INPUT(GPIOD_PIN10) | \ - PIN_MODE_INPUT(GPIOD_PIN11) | \ - PIN_MODE_INPUT(GPIOD_PIN12) | \ - PIN_MODE_INPUT(GPIOD_PIN13) | \ - PIN_MODE_INPUT(GPIOD_PIN14) | \ - PIN_MODE_INPUT(GPIOD_PIN15)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN15)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN15)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ - PIN_ODR_HIGH(GPIOD_PIN1) | \ - PIN_ODR_HIGH(GPIOD_PIN2) | \ - PIN_ODR_HIGH(GPIOD_PIN3) | \ - PIN_ODR_HIGH(GPIOD_PIN4) | \ - PIN_ODR_HIGH(GPIOD_PIN5) | \ - PIN_ODR_HIGH(GPIOD_PIN6) | \ - PIN_ODR_HIGH(GPIOD_PIN7) | \ - PIN_ODR_HIGH(GPIOD_PIN8) | \ - PIN_ODR_HIGH(GPIOD_PIN9) | \ - PIN_ODR_HIGH(GPIOD_PIN10) | \ - PIN_ODR_HIGH(GPIOD_PIN11) | \ - PIN_ODR_HIGH(GPIOD_PIN12) | \ - PIN_ODR_HIGH(GPIOD_PIN13) | \ - PIN_ODR_HIGH(GPIOD_PIN14) | \ - PIN_ODR_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \ - PIN_AFIO_AF(GPIOD_PIN1, 0) | \ - PIN_AFIO_AF(GPIOD_PIN2, 0) | \ - PIN_AFIO_AF(GPIOD_PIN3, 0) | \ - PIN_AFIO_AF(GPIOD_PIN4, 0) | \ - PIN_AFIO_AF(GPIOD_PIN5, 0) | \ - PIN_AFIO_AF(GPIOD_PIN6, 0) | \ - PIN_AFIO_AF(GPIOD_PIN7, 0)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \ - PIN_AFIO_AF(GPIOD_PIN9, 0) | \ - PIN_AFIO_AF(GPIOD_PIN10, 0) | \ - PIN_AFIO_AF(GPIOD_PIN11, 0) | \ - PIN_AFIO_AF(GPIOD_PIN12, 0) | \ - PIN_AFIO_AF(GPIOD_PIN13, 0) | \ - PIN_AFIO_AF(GPIOD_PIN14, 0) | \ - PIN_AFIO_AF(GPIOD_PIN15, 0)) - -/* - * GPIOE setup: - * - * PE0 - PIN0 (input pullup). - * PE1 - PIN1 (input pullup). - * PE2 - PIN2 (input pullup). - * PE3 - PIN3 L3GD20_CS (output pushpull maximum). - * PE4 - PIN4 (input pullup). - * PE5 - PIN5 (input pullup). - * PE6 - PIN6 (input pullup). - * PE7 - PIN7 (input pullup). - * PE8 - PIN8 (output pushpull maximum). - * PE9 - PIN9 (output pushpull maximum). - * PE10 - PIN10 (output pushpull maximum). - * PE11 - PIN11 (output pushpull maximum). - * PE12 - PIN12 (output pushpull maximum). - * PE13 - PIN13 (output pushpull maximum). - * PE14 - PIN14 (output pushpull maximum). - * PE15 - PIN15 (output pushpull maximum). - */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ - PIN_MODE_INPUT(GPIOE_PIN1) | \ - PIN_MODE_INPUT(GPIOE_PIN2) |\ - PIN_MODE_OUTPUT(GPIOE_PIN3) | \ - PIN_MODE_INPUT(GPIOE_PIN4) |\ - PIN_MODE_INPUT(GPIOE_PIN5) |\ - PIN_MODE_INPUT(GPIOE_PIN6) | \ - PIN_MODE_INPUT(GPIOE_PIN7) | \ - PIN_MODE_OUTPUT(GPIOE_PIN8) | \ - PIN_MODE_OUTPUT(GPIOE_PIN9) | \ - PIN_MODE_OUTPUT(GPIOE_PIN10) | \ - PIN_MODE_OUTPUT(GPIOE_PIN11) | \ - PIN_MODE_OUTPUT(GPIOE_PIN12) | \ - PIN_MODE_OUTPUT(GPIOE_PIN13) | \ - PIN_MODE_OUTPUT(GPIOE_PIN14) | \ - PIN_MODE_OUTPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN1) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN2) |\ - PIN_OSPEED_HIGH(GPIOE_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOE_PIN4) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN5) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \ - PIN_OSPEED_HIGH(GPIOE_PIN8) | \ - PIN_OSPEED_HIGH(GPIOE_PIN9) | \ - PIN_OSPEED_HIGH(GPIOE_PIN10) | \ - PIN_OSPEED_HIGH(GPIOE_PIN11) | \ - PIN_OSPEED_HIGH(GPIOE_PIN12) | \ - PIN_OSPEED_HIGH(GPIOE_PIN13) | \ - PIN_OSPEED_HIGH(GPIOE_PIN14) | \ - PIN_OSPEED_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN2) |\ - PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN4) |\ - PIN_PUPDR_PULLUP(GPIOE_PIN5) |\ - PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN14) |\ - PIN_PUPDR_FLOATING(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ - PIN_ODR_HIGH(GPIOE_PIN1) | \ - PIN_ODR_HIGH(GPIOE_PIN2) | \ - PIN_ODR_HIGH(GPIOE_PIN3) | \ - PIN_ODR_HIGH(GPIOE_PIN4) | \ - PIN_ODR_HIGH(GPIOE_PIN5) | \ - PIN_ODR_HIGH(GPIOE_PIN6) | \ - PIN_ODR_HIGH(GPIOE_PIN7) | \ - PIN_ODR_LOW(GPIOE_PIN8) | \ - PIN_ODR_LOW(GPIOE_PIN9) | \ - PIN_ODR_LOW(GPIOE_PIN10) | \ - PIN_ODR_LOW(GPIOE_PIN11) | \ - PIN_ODR_LOW(GPIOE_PIN12) | \ - PIN_ODR_LOW(GPIOE_PIN13) | \ - PIN_ODR_LOW(GPIOE_PIN14) | \ - PIN_ODR_LOW(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \ - PIN_AFIO_AF(GPIOE_PIN1, 0) | \ - PIN_AFIO_AF(GPIOE_PIN2, 0) |\ - PIN_AFIO_AF(GPIOE_PIN3, 0) | \ - PIN_AFIO_AF(GPIOE_PIN4, 0) |\ - PIN_AFIO_AF(GPIOE_PIN5, 0) |\ - PIN_AFIO_AF(GPIOE_PIN6, 0) | \ - PIN_AFIO_AF(GPIOE_PIN7, 0)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \ - PIN_AFIO_AF(GPIOE_PIN9, 0) | \ - PIN_AFIO_AF(GPIOE_PIN10, 0) | \ - PIN_AFIO_AF(GPIOE_PIN11, 0) | \ - PIN_AFIO_AF(GPIOE_PIN12, 0) | \ - PIN_AFIO_AF(GPIOE_PIN13, 0) | \ - PIN_AFIO_AF(GPIOE_PIN14, 0) | \ - PIN_AFIO_AF(GPIOE_PIN15, 0)) - -/* - * GPIOF setup: - * - * PF0 - I2C2_SDA (input floating). - * PF1 - I2C2_SCL (input floating). - * PF2 - PIN2 (input pullup). - * PF3 - PIN3 (input pullup). - * PF4 - PIN4 (input pullup). - * PF5 - PIN5 (input pullup). - * PF6 - PIN6 (input pullup). - * PF7 - PIN7 (input pullup). - * PF8 - PIN8 (input pullup). - * PF9 - PIN9 (input pullup). - * PF10 - PIN10 (input pullup). - * PF11 - PIN11 (input pullup). - * PF12 - PIN12 (input pullup). - * PF13 - PIN13 (input pullup). - * PF14 - PIN14 (input pullup). - * PF15 - PIN15 (input pullup). - */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | \ - PIN_MODE_INPUT(GPIOF_I2C2_SCL) | \ - PIN_MODE_INPUT(GPIOF_PIN2) | \ - PIN_MODE_INPUT(GPIOF_PIN3) | \ - PIN_MODE_INPUT(GPIOF_PIN4) | \ - PIN_MODE_INPUT(GPIOF_PIN5) | \ - PIN_MODE_INPUT(GPIOF_PIN6) | \ - PIN_MODE_INPUT(GPIOF_PIN7) | \ - PIN_MODE_INPUT(GPIOF_PIN8) | \ - PIN_MODE_INPUT(GPIOF_PIN9) | \ - PIN_MODE_INPUT(GPIOF_PIN10) | \ - PIN_MODE_INPUT(GPIOF_PIN11) | \ - PIN_MODE_INPUT(GPIOF_PIN12) | \ - PIN_MODE_INPUT(GPIOF_PIN13) | \ - PIN_MODE_INPUT(GPIOF_PIN14) | \ - PIN_MODE_INPUT(GPIOF_PIN15)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | \ - PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | \ - PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | \ - PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN15)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | \ - PIN_ODR_HIGH(GPIOF_I2C2_SCL) | \ - PIN_ODR_HIGH(GPIOF_PIN2) | \ - PIN_ODR_HIGH(GPIOF_PIN3) | \ - PIN_ODR_HIGH(GPIOF_PIN4) | \ - PIN_ODR_HIGH(GPIOF_PIN5) | \ - PIN_ODR_HIGH(GPIOF_PIN6) | \ - PIN_ODR_HIGH(GPIOF_PIN7) | \ - PIN_ODR_HIGH(GPIOF_PIN8) | \ - PIN_ODR_HIGH(GPIOF_PIN9) | \ - PIN_ODR_HIGH(GPIOF_PIN10) | \ - PIN_ODR_HIGH(GPIOF_PIN11) | \ - PIN_ODR_HIGH(GPIOF_PIN12) | \ - PIN_ODR_HIGH(GPIOF_PIN13) | \ - PIN_ODR_HIGH(GPIOF_PIN14) | \ - PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | \ - PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | \ - PIN_AFIO_AF(GPIOF_PIN2, 0) | \ - PIN_AFIO_AF(GPIOF_PIN3, 0) | \ - PIN_AFIO_AF(GPIOF_PIN4, 0) | \ - PIN_AFIO_AF(GPIOF_PIN5, 0) | \ - PIN_AFIO_AF(GPIOF_PIN6, 0) | \ - PIN_AFIO_AF(GPIOF_PIN7, 0)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \ - PIN_AFIO_AF(GPIOF_PIN9, 0) | \ - PIN_AFIO_AF(GPIOF_PIN10, 0) | \ - PIN_AFIO_AF(GPIOF_PIN11, 0) | \ - PIN_AFIO_AF(GPIOF_PIN12, 0) | \ - PIN_AFIO_AF(GPIOF_PIN13, 0) | \ - PIN_AFIO_AF(GPIOF_PIN14, 0) | \ - PIN_AFIO_AF(GPIOF_PIN15, 0)) - -/* - * GPIOG setup: - * - * PG0 - PIN0 (input pullup). - * PG1 - PIN1 (input pullup). - * PG2 - PIN2 (input pullup). - * PG3 - PIN3 (input pullup). - * PG4 - PIN4 (input pullup). - * PG5 - PIN5 (input pullup). - * PG6 - PIN6 (input pullup). - * PG7 - PIN7 (input pullup). - * PG8 - PIN8 (input pullup). - * PG9 - PIN9 (input pullup). - * PG10 - PIN10 (input pullup). - * PG11 - PIN11 (input pullup). - * PG12 - PIN12 (input pullup). - * PG13 - PIN13 (input pullup). - * PG14 - PIN14 (input pullup). - * PG15 - PIN15 (input pullup). - */ -#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ - PIN_MODE_INPUT(GPIOG_PIN1) | \ - PIN_MODE_INPUT(GPIOG_PIN2) | \ - PIN_MODE_INPUT(GPIOG_PIN3) | \ - PIN_MODE_INPUT(GPIOG_PIN4) | \ - PIN_MODE_INPUT(GPIOG_PIN5) | \ - PIN_MODE_INPUT(GPIOG_PIN6) | \ - PIN_MODE_INPUT(GPIOG_PIN7) | \ - PIN_MODE_INPUT(GPIOG_PIN8) | \ - PIN_MODE_INPUT(GPIOG_PIN9) | \ - PIN_MODE_INPUT(GPIOG_PIN10) | \ - PIN_MODE_INPUT(GPIOG_PIN11) | \ - PIN_MODE_INPUT(GPIOG_PIN12) | \ - PIN_MODE_INPUT(GPIOG_PIN13) | \ - PIN_MODE_INPUT(GPIOG_PIN14) | \ - PIN_MODE_INPUT(GPIOG_PIN15)) -#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) -#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN15)) -#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN15)) -#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ - PIN_ODR_HIGH(GPIOG_PIN1) | \ - PIN_ODR_HIGH(GPIOG_PIN2) | \ - PIN_ODR_HIGH(GPIOG_PIN3) | \ - PIN_ODR_HIGH(GPIOG_PIN4) | \ - PIN_ODR_HIGH(GPIOG_PIN5) | \ - PIN_ODR_HIGH(GPIOG_PIN6) | \ - PIN_ODR_HIGH(GPIOG_PIN7) | \ - PIN_ODR_HIGH(GPIOG_PIN8) | \ - PIN_ODR_HIGH(GPIOG_PIN9) | \ - PIN_ODR_HIGH(GPIOG_PIN10) | \ - PIN_ODR_HIGH(GPIOG_PIN11) | \ - PIN_ODR_HIGH(GPIOG_PIN12) | \ - PIN_ODR_HIGH(GPIOG_PIN13) | \ - PIN_ODR_HIGH(GPIOG_PIN14) | \ - PIN_ODR_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \ - PIN_AFIO_AF(GPIOG_PIN1, 0) | \ - PIN_AFIO_AF(GPIOG_PIN2, 0) | \ - PIN_AFIO_AF(GPIOG_PIN3, 0) | \ - PIN_AFIO_AF(GPIOG_PIN4, 0) | \ - PIN_AFIO_AF(GPIOG_PIN5, 0) | \ - PIN_AFIO_AF(GPIOG_PIN6, 0) | \ - PIN_AFIO_AF(GPIOG_PIN7, 0)) -#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \ - PIN_AFIO_AF(GPIOG_PIN9, 0) | \ - PIN_AFIO_AF(GPIOG_PIN10, 0) | \ - PIN_AFIO_AF(GPIOG_PIN11, 0) | \ - PIN_AFIO_AF(GPIOG_PIN12, 0) | \ - PIN_AFIO_AF(GPIOG_PIN13, 0) | \ - PIN_AFIO_AF(GPIOG_PIN14, 0) | \ - PIN_AFIO_AF(GPIOG_PIN15, 0)) - -/* - * GPIOH setup: - * - * PH0 - PIN0 (input pullup). - * PH1 - PIN1 (input pullup). - * PH2 - PIN2 (input pullup). - * PH3 - PIN3 (input pullup). - * PH4 - PIN4 (input pullup). - * PH5 - PIN5 (input pullup). - * PH6 - PIN6 (input pullup). - * PH7 - PIN7 (input pullup). - * PH8 - PIN8 (input pullup). - * PH9 - PIN9 (input pullup). - * PH10 - PIN10 (input pullup). - * PH11 - PIN11 (input pullup). - * PH12 - PIN12 (input pullup). - * PH13 - PIN13 (input pullup). - * PH14 - PIN14 (input pullup). - * PH15 - PIN15 (input pullup). - */ -#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \ - PIN_MODE_INPUT(GPIOH_PIN1) | \ - PIN_MODE_INPUT(GPIOH_PIN2) | \ - PIN_MODE_INPUT(GPIOH_PIN3) | \ - PIN_MODE_INPUT(GPIOH_PIN4) | \ - PIN_MODE_INPUT(GPIOH_PIN5) | \ - PIN_MODE_INPUT(GPIOH_PIN6) | \ - PIN_MODE_INPUT(GPIOH_PIN7) | \ - PIN_MODE_INPUT(GPIOH_PIN8) | \ - PIN_MODE_INPUT(GPIOH_PIN9) | \ - PIN_MODE_INPUT(GPIOH_PIN10) | \ - PIN_MODE_INPUT(GPIOH_PIN11) | \ - PIN_MODE_INPUT(GPIOH_PIN12) | \ - PIN_MODE_INPUT(GPIOH_PIN13) | \ - PIN_MODE_INPUT(GPIOH_PIN14) | \ - PIN_MODE_INPUT(GPIOH_PIN15)) -#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) -#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN15)) -#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN15)) -#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \ - PIN_ODR_HIGH(GPIOH_PIN1) | \ - PIN_ODR_HIGH(GPIOH_PIN2) | \ - PIN_ODR_HIGH(GPIOH_PIN3) | \ - PIN_ODR_HIGH(GPIOH_PIN4) | \ - PIN_ODR_HIGH(GPIOH_PIN5) | \ - PIN_ODR_HIGH(GPIOH_PIN6) | \ - PIN_ODR_HIGH(GPIOH_PIN7) | \ - PIN_ODR_HIGH(GPIOH_PIN8) | \ - PIN_ODR_HIGH(GPIOH_PIN9) | \ - PIN_ODR_HIGH(GPIOH_PIN10) | \ - PIN_ODR_HIGH(GPIOH_PIN11) | \ - PIN_ODR_HIGH(GPIOH_PIN12) | \ - PIN_ODR_HIGH(GPIOH_PIN13) | \ - PIN_ODR_HIGH(GPIOH_PIN14) | \ - PIN_ODR_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | \ - PIN_AFIO_AF(GPIOH_PIN1, 0) | \ - PIN_AFIO_AF(GPIOH_PIN2, 0) | \ - PIN_AFIO_AF(GPIOH_PIN3, 0) | \ - PIN_AFIO_AF(GPIOH_PIN4, 0) | \ - PIN_AFIO_AF(GPIOH_PIN5, 0) | \ - PIN_AFIO_AF(GPIOH_PIN6, 0) | \ - PIN_AFIO_AF(GPIOH_PIN7, 0)) -#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \ - PIN_AFIO_AF(GPIOH_PIN9, 0) | \ - PIN_AFIO_AF(GPIOH_PIN10, 0) | \ - PIN_AFIO_AF(GPIOH_PIN11, 0) | \ - PIN_AFIO_AF(GPIOH_PIN12, 0) | \ - PIN_AFIO_AF(GPIOH_PIN13, 0) | \ - PIN_AFIO_AF(GPIOH_PIN14, 0) | \ - PIN_AFIO_AF(GPIOH_PIN15, 0)) - - -/* - * USB bus activation macro, required by the USB driver. - */ -// #define usb_lld_connect_bus(usbp) -#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14))) -// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT) -/* - * USB bus de-activation macro, required by the USB driver. - */ -// #define usb_lld_disconnect_bus(usbp) -#define usb_lld_disconnect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); palClearPad(GPIOA, GPIOA_USB_DP) -// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12) - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.mk b/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.mk deleted file mode 100644 index 43377629a3..0000000000 --- a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC diff --git a/keyboards/hs60/v2/bootloader_defs.h b/keyboards/hs60/v2/bootloader_defs.h deleted file mode 100644 index 3b0e9d20a6..0000000000 --- a/keyboards/hs60/v2/bootloader_defs.h +++ /dev/null @@ -1,7 +0,0 @@ -/* Address for jumping to bootloader on STM32 chips. */ -/* It is chip dependent, the correct number can be looked up here: - * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf - * This also requires a patch to chibios: - * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch - */ -#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800 diff --git a/keyboards/hs60/v2/rules.mk b/keyboards/hs60/v2/rules.mk index c2b643ad10..6c32342589 100644 --- a/keyboards/hs60/v2/rules.mk +++ b/keyboards/hs60/v2/rules.mk @@ -1,52 +1,11 @@ -# project specific files -SRC = keyboards/wilba_tech/wt_main.c \ - keyboards/wilba_tech/wt_rgb_backlight.c \ - drivers/issi/is31fl3733.c \ - quantum/color.c \ - drivers/arm/i2c_master.c - -## chip/board settings -# the next two should match the directories in -# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) -MCU_FAMILY = STM32 -MCU_SERIES = STM32F3xx - -# Linker script to use -# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ -# or <this_dir>/ld/ -MCU_LDSCRIPT = STM32F303xC - -# Startup code to use -# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ -MCU_STARTUP = stm32f3xx - -# Board: it should exist either in <chibios>/os/hal/boards/ -# or <this_dir>/boards -BOARD = GENERIC_STM32_F303XC - -# Cortex version -MCU = cortex-m4 - -# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 -ARMV = 7 - -USE_FPU = yes - -# Vector table for application -# 0x00000000-0x00001000 area is occupied by bootlaoder.*/ -# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB -# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 -OPT_DEFS = +# MCU name +MCU = STM32F303 # Do not put the microcontroller into power saving mode # when we get USB suspend event. We want it to keep updating # backlight effects. OPT_DEFS += -DNO_SUSPEND_POWER_DOWN -# Options to pass to dfu-util when flashing -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -p DF11 -v 0483 - # Build Options # comment out to disable the options. # @@ -67,3 +26,10 @@ DYNAMIC_KEYMAP_ENABLE = no CIE1931_CURVE = yes LAYOUTS = 60_ansi 60_iso + +# project specific files +SRC = keyboards/wilba_tech/wt_main.c \ + keyboards/wilba_tech/wt_rgb_backlight.c \ + drivers/issi/is31fl3733.c \ + quantum/color.c \ + drivers/arm/i2c_master.c diff --git a/keyboards/kbdfans/kbd67/mkiirgb/rules.mk b/keyboards/kbdfans/kbd67/mkiirgb/rules.mk index 782d86c1ea..ea3746069f 100644 --- a/keyboards/kbdfans/kbd67/mkiirgb/rules.mk +++ b/keyboards/kbdfans/kbd67/mkiirgb/rules.mk @@ -1,6 +1,6 @@ -MCU = STM32F303 -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -p DF11 -v 0483 +# MCU name +MCU = STM32F303 + BACKLIGHT_ENABLE = no BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration MOUSEKEY_ENABLE = yes # Mouse keys @@ -11,4 +11,4 @@ NKRO_ENABLE = yes # USB Nkey Rollover AUDIO_ENABLE = no RGB_MATRIX_ENABLE = yes # Use RGB matrix -LAYOUTS = 65_ansi_blocker
\ No newline at end of file +LAYOUTS = 65_ansi_blocker diff --git a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.c b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.c deleted file mode 100755 index 4331155df4..0000000000 --- a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -#if HAL_USE_PAL || defined(__DOXYGEN__) -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -const PALConfig pal_default_config = { -#if STM32_HAS_GPIOA - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, -#endif -#if STM32_HAS_GPIOB - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, -#endif -#if STM32_HAS_GPIOC - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, -#endif -#if STM32_HAS_GPIOD - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, -#endif -#if STM32_HAS_GPIOE - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, -#endif -#if STM32_HAS_GPIOF - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, -#endif -#if STM32_HAS_GPIOG - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, -#endif -#if STM32_HAS_GPIOH - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, -#endif -#if STM32_HAS_GPIOI - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} -#endif -}; -#endif - -void enter_bootloader_mode_if_requested(void); - -/** - * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. - */ -void __early_init(void) { - enter_bootloader_mode_if_requested(); - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief SDC card write protection detection. - */ -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return true; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool mmc_lld_is_write_protected(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return false; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) { -} diff --git a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.h b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.h deleted file mode 100755 index 54df72ea68..0000000000 --- a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.h +++ /dev/null @@ -1,1187 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for NK65 Keyboard - */ - -/* - * Board identifier. - */ -#define BOARD_GENERIC_STM32_F303XC -#define BOARD_NAME "NK65 PCB" - -/* - * Board oscillators-related settings. - * NOTE: LSE not fitted. - */ -#if !defined(STM32_LSECLK) -#define STM32_LSECLK 0U -#endif - -#define STM32_LSEDRV (3U << 3U) - -#if !defined(STM32_HSECLK) -#define STM32_HSECLK 8000000U -#endif - -// #define STM32_HSE_BYPASS - -/* - * MCU type as defined in the ST header. - */ -#define STM32F303xC - -/* - * IO pins assignments. - */ -#define GPIOA_PIN0 0U -#define GPIOA_PIN1 1U -#define GPIOA_PIN2 2U -#define GPIOA_PIN3 3U -#define GPIOA_PIN4 4U -#define GPIOA_PIN5 5U -#define GPIOA_PIN6 6U -#define GPIOA_PIN7 7U -#define GPIOA_PIN8 8U -#define GPIOA_PIN9 9U -#define GPIOA_PIN10 10U -#define GPIOA_USB_DM 11U -#define GPIOA_USB_DP 12U -#define GPIOA_SWDIO 13U -#define GPIOA_SWCLK 14U -#define GPIOA_PIN15 15U - -#define GPIOB_PIN0 0U -#define GPIOB_PIN1 1U -#define GPIOB_PIN2 2U -#define GPIOB_PIN3 3U -#define GPIOB_PIN4 4U -#define GPIOB_PIN5 5U -#define GPIOB_PIN6 6U -#define GPIOB_PIN7 7U -#define GPIOB_PIN8 8U -#define GPIOB_PIN9 9U -#define GPIOB_PIN10 10U -#define GPIOB_PIN11 11U -#define GPIOB_PIN12 12U -#define GPIOB_PIN13 13U -#define GPIOB_PIN14 14U -#define GPIOB_PIN15 15U - -#define GPIOC_PIN0 0U -#define GPIOC_PIN1 1U -#define GPIOC_PIN2 2U -#define GPIOC_PIN3 3U -#define GPIOC_PIN4 4U -#define GPIOC_PIN5 5U -#define GPIOC_PIN6 6U -#define GPIOC_PIN7 7U -#define GPIOC_PIN8 8U -#define GPIOC_PIN9 9U -#define GPIOC_PIN10 10U -#define GPIOC_PIN11 11U -#define GPIOC_PIN12 12U -#define GPIOC_PIN13 13U -#define GPIOC_PIN14 14U -#define GPIOC_PIN15 15U - -#define GPIOD_PIN0 0U -#define GPIOD_PIN1 1U -#define GPIOD_PIN2 2U -#define GPIOD_PIN3 3U -#define GPIOD_PIN4 4U -#define GPIOD_PIN5 5U -#define GPIOD_PIN6 6U -#define GPIOD_PIN7 7U -#define GPIOD_PIN8 8U -#define GPIOD_PIN9 9U -#define GPIOD_PIN10 10U -#define GPIOD_PIN11 11U -#define GPIOD_PIN12 12U -#define GPIOD_PIN13 13U -#define GPIOD_PIN14 14U -#define GPIOD_PIN15 15U - -#define GPIOE_PIN0 0U -#define GPIOE_PIN1 1U -#define GPIOE_PIN2 2U -#define GPIOE_PIN3 3U -#define GPIOE_PIN4 4U -#define GPIOE_PIN5 5U -#define GPIOE_PIN6 6U -#define GPIOE_PIN7 7U -#define GPIOE_PIN8 8U -#define GPIOE_PIN9 9U -#define GPIOE_PIN10 10U -#define GPIOE_PIN11 11U -#define GPIOE_PIN12 12U -#define GPIOE_PIN13 13U -#define GPIOE_PIN14 14U -#define GPIOE_PIN15 15U - -#define GPIOF_I2C2_SDA 0U -#define GPIOF_I2C2_SCL 1U -#define GPIOF_PIN2 2U -#define GPIOF_PIN3 3U -#define GPIOF_PIN4 4U -#define GPIOF_PIN5 5U -#define GPIOF_PIN6 6U -#define GPIOF_PIN7 7U -#define GPIOF_PIN8 8U -#define GPIOF_PIN9 9U -#define GPIOF_PIN10 10U -#define GPIOF_PIN11 11U -#define GPIOF_PIN12 12U -#define GPIOF_PIN13 13U -#define GPIOF_PIN14 14U -#define GPIOF_PIN15 15U - -#define GPIOG_PIN0 0U -#define GPIOG_PIN1 1U -#define GPIOG_PIN2 2U -#define GPIOG_PIN3 3U -#define GPIOG_PIN4 4U -#define GPIOG_PIN5 5U -#define GPIOG_PIN6 6U -#define GPIOG_PIN7 7U -#define GPIOG_PIN8 8U -#define GPIOG_PIN9 9U -#define GPIOG_PIN10 10U -#define GPIOG_PIN11 11U -#define GPIOG_PIN12 12U -#define GPIOG_PIN13 13U -#define GPIOG_PIN14 14U -#define GPIOG_PIN15 15U - -#define GPIOH_PIN0 0U -#define GPIOH_PIN1 1U -#define GPIOH_PIN2 2U -#define GPIOH_PIN3 3U -#define GPIOH_PIN4 4U -#define GPIOH_PIN5 5U -#define GPIOH_PIN6 6U -#define GPIOH_PIN7 7U -#define GPIOH_PIN8 8U -#define GPIOH_PIN9 9U -#define GPIOH_PIN10 10U -#define GPIOH_PIN11 11U -#define GPIOH_PIN12 12U -#define GPIOH_PIN13 13U -#define GPIOH_PIN14 14U -#define GPIOH_PIN15 15U - -/* - * IO lines assignments. - */ -#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U) -#define LINE_USB_DM PAL_LINE(GPIOA, 11U) -#define LINE_USB_DP PAL_LINE(GPIOA, 12U) -#define LINE_SWDIO PAL_LINE(GPIOA, 13U) -#define LINE_SWCLK PAL_LINE(GPIOA, 14U) - -#define LINE_PIN6 PAL_LINE(GPIOF, 0U) -#define LINE_PIN7 PAL_LINE(GPIOF, 1U) - -#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U) - - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) -#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) -#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) -#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) -#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) -#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) -#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) - -/* - * GPIOA setup: - * - * PA0 - NC - * PA1 - NC - * PA2 - COL1 - * PA3 - COL2 - * PA4 - SPEAKER1 - * PA5 - SPEAKER2 - * PA6 - COL3 - * PA7 - COL8 - * PA8 - COL6 - * PA9 - COL7 - * PA10 - ROW5 - * PA11 - USB_DM (alternate 14). - * PA12 - USB_DP (alternate 14). - * PA13 - SWDIO (alternate 0). - * PA14 - SWCLK (alternate 0). - * PA15 - ROW4 - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \ - PIN_MODE_ALTERNATE(GPIOA_PIN1) | \ - PIN_MODE_INPUT(GPIOA_PIN2) | \ - PIN_MODE_INPUT(GPIOA_PIN3) | \ - PIN_MODE_INPUT(GPIOA_PIN4) | \ - PIN_MODE_INPUT(GPIOA_PIN5) | \ - PIN_MODE_INPUT(GPIOA_PIN6) | \ - PIN_MODE_INPUT(GPIOA_PIN7) | \ - PIN_MODE_INPUT(GPIOA_PIN8) | \ - PIN_MODE_INPUT(GPIOA_PIN9) | \ - PIN_MODE_INPUT(GPIOA_PIN10) | \ - PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \ - PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \ - PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ - PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ - PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \ - PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \ - PIN_OSPEED_HIGH(GPIOA_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \ - PIN_OSPEED_HIGH(GPIOA_USB_DM) | \ - PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \ - PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ - PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ - PIN_OSPEED_VERYLOW(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \ - PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \ - PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ - PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \ - PIN_ODR_HIGH(GPIOA_PIN1) | \ - PIN_ODR_HIGH(GPIOA_PIN2) | \ - PIN_ODR_HIGH(GPIOA_PIN3) | \ - PIN_ODR_HIGH(GPIOA_PIN4) | \ - PIN_ODR_HIGH(GPIOA_PIN5) | \ - PIN_ODR_HIGH(GPIOA_PIN6) | \ - PIN_ODR_HIGH(GPIOA_PIN7) | \ - PIN_ODR_HIGH(GPIOA_PIN8) | \ - PIN_ODR_HIGH(GPIOA_PIN9) | \ - PIN_ODR_HIGH(GPIOA_PIN10) | \ - PIN_ODR_HIGH(GPIOA_USB_DM) | \ - PIN_ODR_HIGH(GPIOA_USB_DP) | \ - PIN_ODR_HIGH(GPIOA_SWDIO) | \ - PIN_ODR_HIGH(GPIOA_SWCLK) | \ - PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \ - PIN_AFIO_AF(GPIOA_PIN1, 1) | \ - PIN_AFIO_AF(GPIOA_PIN2, 0) | \ - PIN_AFIO_AF(GPIOA_PIN3, 0) | \ - PIN_AFIO_AF(GPIOA_PIN4, 0) | \ - PIN_AFIO_AF(GPIOA_PIN5, 5) | \ - PIN_AFIO_AF(GPIOA_PIN6, 5) | \ - PIN_AFIO_AF(GPIOA_PIN7, 5)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ - PIN_AFIO_AF(GPIOA_PIN9, 0) | \ - PIN_AFIO_AF(GPIOA_PIN10, 0) | \ - PIN_AFIO_AF(GPIOA_USB_DM, 14) | \ - PIN_AFIO_AF(GPIOA_USB_DP, 14) | \ - PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ - PIN_AFIO_AF(GPIOA_SWCLK, 0) | \ - PIN_AFIO_AF(GPIOA_PIN15, 0)) - -/* - * GPIOB setup: - * - * PB0 - PIN0 (input pullup). - * PB1 - PIN1 (input pullup). - * PB2 - PIN2 (input pullup). - * PB3 - PIN3 (alternate 0). - * PB4 - PIN4 (input pullup). - * PB5 - PIN5 (input pullup). - * PB6 - PIN6 LSM303DLHC_SCL (alternate 4). - * PB7 - PIN7 LSM303DLHC_SDA (alternate 4). - * PB8 - PIN8 (input pullup). - * PB9 - PIN9 (input pullup). - * PB10 - PIN10 (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ - PIN_MODE_INPUT(GPIOB_PIN1) | \ - PIN_MODE_INPUT(GPIOB_PIN2) | \ - PIN_MODE_ALTERNATE(GPIOB_PIN3) | \ - PIN_MODE_INPUT(GPIOB_PIN4) | \ - PIN_MODE_INPUT(GPIOB_PIN5) | \ - PIN_MODE_ALTERNATE(GPIOB_PIN6) | \ - PIN_MODE_OUTPUT(GPIOB_PIN7) | \ - PIN_MODE_INPUT(GPIOB_PIN8) | \ - PIN_MODE_INPUT(GPIOB_PIN9) | \ - PIN_MODE_INPUT(GPIOB_PIN10) | \ - PIN_MODE_INPUT(GPIOB_PIN11) | \ - PIN_MODE_INPUT(GPIOB_PIN12) | \ - PIN_MODE_INPUT(GPIOB_PIN13) | \ - PIN_MODE_INPUT(GPIOB_PIN14) | \ - PIN_MODE_INPUT(GPIOB_PIN15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ - PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \ - PIN_OSPEED_HIGH(GPIOB_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ - PIN_OSPEED_HIGH(GPIOB_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN6) | \ - PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ - PIN_ODR_HIGH(GPIOB_PIN1) | \ - PIN_ODR_HIGH(GPIOB_PIN2) | \ - PIN_ODR_HIGH(GPIOB_PIN3) | \ - PIN_ODR_HIGH(GPIOB_PIN4) | \ - PIN_ODR_HIGH(GPIOB_PIN5) | \ - PIN_ODR_HIGH(GPIOB_PIN6) | \ - PIN_ODR_LOW(GPIOB_PIN7) | \ - PIN_ODR_HIGH(GPIOB_PIN8) | \ - PIN_ODR_HIGH(GPIOB_PIN9) | \ - PIN_ODR_HIGH(GPIOB_PIN10) | \ - PIN_ODR_HIGH(GPIOB_PIN11) | \ - PIN_ODR_HIGH(GPIOB_PIN12) | \ - PIN_ODR_HIGH(GPIOB_PIN13) | \ - PIN_ODR_HIGH(GPIOB_PIN14) | \ - PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \ - PIN_AFIO_AF(GPIOB_PIN1, 0) | \ - PIN_AFIO_AF(GPIOB_PIN2, 0) | \ - PIN_AFIO_AF(GPIOB_PIN3, 0) | \ - PIN_AFIO_AF(GPIOB_PIN4, 0) | \ - PIN_AFIO_AF(GPIOB_PIN5, 0) | \ - PIN_AFIO_AF(GPIOB_PIN6, 4) | \ - PIN_AFIO_AF(GPIOB_PIN7, 0)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \ - PIN_AFIO_AF(GPIOB_PIN9, 0) | \ - PIN_AFIO_AF(GPIOB_PIN10, 0) | \ - PIN_AFIO_AF(GPIOB_PIN11, 0) | \ - PIN_AFIO_AF(GPIOB_PIN12, 0) | \ - PIN_AFIO_AF(GPIOB_PIN13, 0) | \ - PIN_AFIO_AF(GPIOB_PIN14, 0) | \ - PIN_AFIO_AF(GPIOB_PIN15, 0)) - -/* - * GPIOC setup: - * - * PC0 - PIN0 (input pullup). - * PC1 - PIN1 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - PIN3 (input pullup). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - PIN6 (input pullup). - * PC7 - PIN7 (input pullup). - * PC8 - PIN8 (input pullup). - * PC9 - PIN9 (input pullup). - * PC10 - PIN10 (input pullup). - * PC11 - PIN11 (input pullup). - * PC12 - PIN12 (input pullup). - * PC13 - PIN13 (input pullup). - * PC14 - PIN14 (input floating). - * PC15 - PIN15 (input floating). - */ -#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ - PIN_MODE_INPUT(GPIOC_PIN1) | \ - PIN_MODE_INPUT(GPIOC_PIN2) | \ - PIN_MODE_INPUT(GPIOC_PIN3) | \ - PIN_MODE_INPUT(GPIOC_PIN4) | \ - PIN_MODE_INPUT(GPIOC_PIN5) | \ - PIN_MODE_INPUT(GPIOC_PIN6) | \ - PIN_MODE_INPUT(GPIOC_PIN7) | \ - PIN_MODE_INPUT(GPIOC_PIN8) | \ - PIN_MODE_INPUT(GPIOC_PIN9) | \ - PIN_MODE_INPUT(GPIOC_PIN10) | \ - PIN_MODE_INPUT(GPIOC_PIN11) | \ - PIN_MODE_INPUT(GPIOC_PIN12) | \ - PIN_MODE_INPUT(GPIOC_PIN13) | \ - PIN_MODE_INPUT(GPIOC_PIN14) | \ - PIN_MODE_INPUT(GPIOC_PIN15)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \ - PIN_OSPEED_HIGH(GPIOC_PIN14) | \ - PIN_OSPEED_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN15)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ - PIN_ODR_HIGH(GPIOC_PIN1) | \ - PIN_ODR_HIGH(GPIOC_PIN2) | \ - PIN_ODR_HIGH(GPIOC_PIN3) | \ - PIN_ODR_HIGH(GPIOC_PIN4) | \ - PIN_ODR_HIGH(GPIOC_PIN5) | \ - PIN_ODR_HIGH(GPIOC_PIN6) | \ - PIN_ODR_HIGH(GPIOC_PIN7) | \ - PIN_ODR_HIGH(GPIOC_PIN8) | \ - PIN_ODR_HIGH(GPIOC_PIN9) | \ - PIN_ODR_HIGH(GPIOC_PIN10) | \ - PIN_ODR_HIGH(GPIOC_PIN11) | \ - PIN_ODR_HIGH(GPIOC_PIN12) | \ - PIN_ODR_HIGH(GPIOC_PIN13) | \ - PIN_ODR_HIGH(GPIOC_PIN14) | \ - PIN_ODR_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \ - PIN_AFIO_AF(GPIOC_PIN1, 0) | \ - PIN_AFIO_AF(GPIOC_PIN2, 0) | \ - PIN_AFIO_AF(GPIOC_PIN3, 0) | \ - PIN_AFIO_AF(GPIOC_PIN4, 0) | \ - PIN_AFIO_AF(GPIOC_PIN5, 0) | \ - PIN_AFIO_AF(GPIOC_PIN6, 0) | \ - PIN_AFIO_AF(GPIOC_PIN7, 0)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \ - PIN_AFIO_AF(GPIOC_PIN9, 0) | \ - PIN_AFIO_AF(GPIOC_PIN10, 0) | \ - PIN_AFIO_AF(GPIOC_PIN11, 0) | \ - PIN_AFIO_AF(GPIOC_PIN12, 0) | \ - PIN_AFIO_AF(GPIOC_PIN13, 0) | \ - PIN_AFIO_AF(GPIOC_PIN14, 0) | \ - PIN_AFIO_AF(GPIOC_PIN15, 0)) - -/* - * GPIOD setup: - * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - PIN4 (input pullup). - * PD5 - PIN5 (input pullup). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD11 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - PIN12 (input pullup). - * PD13 - PIN13 (input pullup). - * PD14 - PIN14 (input pullup). - * PD15 - PIN15 (input pullup). - */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ - PIN_MODE_INPUT(GPIOD_PIN1) | \ - PIN_MODE_INPUT(GPIOD_PIN2) | \ - PIN_MODE_INPUT(GPIOD_PIN3) | \ - PIN_MODE_INPUT(GPIOD_PIN4) | \ - PIN_MODE_INPUT(GPIOD_PIN5) | \ - PIN_MODE_INPUT(GPIOD_PIN6) | \ - PIN_MODE_INPUT(GPIOD_PIN7) | \ - PIN_MODE_INPUT(GPIOD_PIN8) | \ - PIN_MODE_INPUT(GPIOD_PIN9) | \ - PIN_MODE_INPUT(GPIOD_PIN10) | \ - PIN_MODE_INPUT(GPIOD_PIN11) | \ - PIN_MODE_INPUT(GPIOD_PIN12) | \ - PIN_MODE_INPUT(GPIOD_PIN13) | \ - PIN_MODE_INPUT(GPIOD_PIN14) | \ - PIN_MODE_INPUT(GPIOD_PIN15)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOD_PIN15)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN15)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ - PIN_ODR_HIGH(GPIOD_PIN1) | \ - PIN_ODR_HIGH(GPIOD_PIN2) | \ - PIN_ODR_HIGH(GPIOD_PIN3) | \ - PIN_ODR_HIGH(GPIOD_PIN4) | \ - PIN_ODR_HIGH(GPIOD_PIN5) | \ - PIN_ODR_HIGH(GPIOD_PIN6) | \ - PIN_ODR_HIGH(GPIOD_PIN7) | \ - PIN_ODR_HIGH(GPIOD_PIN8) | \ - PIN_ODR_HIGH(GPIOD_PIN9) | \ - PIN_ODR_HIGH(GPIOD_PIN10) | \ - PIN_ODR_HIGH(GPIOD_PIN11) | \ - PIN_ODR_HIGH(GPIOD_PIN12) | \ - PIN_ODR_HIGH(GPIOD_PIN13) | \ - PIN_ODR_HIGH(GPIOD_PIN14) | \ - PIN_ODR_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \ - PIN_AFIO_AF(GPIOD_PIN1, 0) | \ - PIN_AFIO_AF(GPIOD_PIN2, 0) | \ - PIN_AFIO_AF(GPIOD_PIN3, 0) | \ - PIN_AFIO_AF(GPIOD_PIN4, 0) | \ - PIN_AFIO_AF(GPIOD_PIN5, 0) | \ - PIN_AFIO_AF(GPIOD_PIN6, 0) | \ - PIN_AFIO_AF(GPIOD_PIN7, 0)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \ - PIN_AFIO_AF(GPIOD_PIN9, 0) | \ - PIN_AFIO_AF(GPIOD_PIN10, 0) | \ - PIN_AFIO_AF(GPIOD_PIN11, 0) | \ - PIN_AFIO_AF(GPIOD_PIN12, 0) | \ - PIN_AFIO_AF(GPIOD_PIN13, 0) | \ - PIN_AFIO_AF(GPIOD_PIN14, 0) | \ - PIN_AFIO_AF(GPIOD_PIN15, 0)) - -/* - * GPIOE setup: - * - * PE0 - PIN0 (input pullup). - * PE1 - PIN1 (input pullup). - * PE2 - PIN2 (input pullup). - * PE3 - PIN3 L3GD20_CS (output pushpull maximum). - * PE4 - PIN4 (input pullup). - * PE5 - PIN5 (input pullup). - * PE6 - PIN6 (input pullup). - * PE7 - PIN7 (input pullup). - * PE8 - PIN8 (output pushpull maximum). - * PE9 - PIN9 (output pushpull maximum). - * PE10 - PIN10 (output pushpull maximum). - * PE11 - PIN11 (output pushpull maximum). - * PE12 - PIN12 (output pushpull maximum). - * PE13 - PIN13 (output pushpull maximum). - * PE14 - PIN14 (output pushpull maximum). - * PE15 - PIN15 (output pushpull maximum). - */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ - PIN_MODE_INPUT(GPIOE_PIN1) | \ - PIN_MODE_INPUT(GPIOE_PIN2) |\ - PIN_MODE_OUTPUT(GPIOE_PIN3) | \ - PIN_MODE_INPUT(GPIOE_PIN4) |\ - PIN_MODE_INPUT(GPIOE_PIN5) |\ - PIN_MODE_INPUT(GPIOE_PIN6) | \ - PIN_MODE_INPUT(GPIOE_PIN7) | \ - PIN_MODE_OUTPUT(GPIOE_PIN8) | \ - PIN_MODE_OUTPUT(GPIOE_PIN9) | \ - PIN_MODE_OUTPUT(GPIOE_PIN10) | \ - PIN_MODE_OUTPUT(GPIOE_PIN11) | \ - PIN_MODE_OUTPUT(GPIOE_PIN12) | \ - PIN_MODE_OUTPUT(GPIOE_PIN13) | \ - PIN_MODE_OUTPUT(GPIOE_PIN14) | \ - PIN_MODE_OUTPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |\ - PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN1) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN2) |\ - PIN_OSPEED_HIGH(GPIOE_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOE_PIN4) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN5) |\ - PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \ - PIN_OSPEED_HIGH(GPIOE_PIN8) | \ - PIN_OSPEED_HIGH(GPIOE_PIN9) | \ - PIN_OSPEED_HIGH(GPIOE_PIN10) | \ - PIN_OSPEED_HIGH(GPIOE_PIN11) | \ - PIN_OSPEED_HIGH(GPIOE_PIN12) | \ - PIN_OSPEED_HIGH(GPIOE_PIN13) | \ - PIN_OSPEED_HIGH(GPIOE_PIN14) | \ - PIN_OSPEED_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN2) |\ - PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN4) |\ - PIN_PUPDR_PULLUP(GPIOE_PIN5) |\ - PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN14) |\ - PIN_PUPDR_FLOATING(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ - PIN_ODR_HIGH(GPIOE_PIN1) | \ - PIN_ODR_HIGH(GPIOE_PIN2) | \ - PIN_ODR_HIGH(GPIOE_PIN3) | \ - PIN_ODR_HIGH(GPIOE_PIN4) | \ - PIN_ODR_HIGH(GPIOE_PIN5) | \ - PIN_ODR_HIGH(GPIOE_PIN6) | \ - PIN_ODR_HIGH(GPIOE_PIN7) | \ - PIN_ODR_LOW(GPIOE_PIN8) | \ - PIN_ODR_LOW(GPIOE_PIN9) | \ - PIN_ODR_LOW(GPIOE_PIN10) | \ - PIN_ODR_LOW(GPIOE_PIN11) | \ - PIN_ODR_LOW(GPIOE_PIN12) | \ - PIN_ODR_LOW(GPIOE_PIN13) | \ - PIN_ODR_LOW(GPIOE_PIN14) | \ - PIN_ODR_LOW(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \ - PIN_AFIO_AF(GPIOE_PIN1, 0) | \ - PIN_AFIO_AF(GPIOE_PIN2, 0) |\ - PIN_AFIO_AF(GPIOE_PIN3, 0) | \ - PIN_AFIO_AF(GPIOE_PIN4, 0) |\ - PIN_AFIO_AF(GPIOE_PIN5, 0) |\ - PIN_AFIO_AF(GPIOE_PIN6, 0) | \ - PIN_AFIO_AF(GPIOE_PIN7, 0)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \ - PIN_AFIO_AF(GPIOE_PIN9, 0) | \ - PIN_AFIO_AF(GPIOE_PIN10, 0) | \ - PIN_AFIO_AF(GPIOE_PIN11, 0) | \ - PIN_AFIO_AF(GPIOE_PIN12, 0) | \ - PIN_AFIO_AF(GPIOE_PIN13, 0) | \ - PIN_AFIO_AF(GPIOE_PIN14, 0) | \ - PIN_AFIO_AF(GPIOE_PIN15, 0)) - -/* - * GPIOF setup: - * - * PF0 - I2C2_SDA (input floating). - * PF1 - I2C2_SCL (input floating). - * PF2 - PIN2 (input pullup). - * PF3 - PIN3 (input pullup). - * PF4 - PIN4 (input pullup). - * PF5 - PIN5 (input pullup). - * PF6 - PIN6 (input pullup). - * PF7 - PIN7 (input pullup). - * PF8 - PIN8 (input pullup). - * PF9 - PIN9 (input pullup). - * PF10 - PIN10 (input pullup). - * PF11 - PIN11 (input pullup). - * PF12 - PIN12 (input pullup). - * PF13 - PIN13 (input pullup). - * PF14 - PIN14 (input pullup). - * PF15 - PIN15 (input pullup). - */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | \ - PIN_MODE_INPUT(GPIOF_I2C2_SCL) | \ - PIN_MODE_INPUT(GPIOF_PIN2) | \ - PIN_MODE_INPUT(GPIOF_PIN3) | \ - PIN_MODE_INPUT(GPIOF_PIN4) | \ - PIN_MODE_INPUT(GPIOF_PIN5) | \ - PIN_MODE_INPUT(GPIOF_PIN6) | \ - PIN_MODE_INPUT(GPIOF_PIN7) | \ - PIN_MODE_INPUT(GPIOF_PIN8) | \ - PIN_MODE_INPUT(GPIOF_PIN9) | \ - PIN_MODE_INPUT(GPIOF_PIN10) | \ - PIN_MODE_INPUT(GPIOF_PIN11) | \ - PIN_MODE_INPUT(GPIOF_PIN12) | \ - PIN_MODE_INPUT(GPIOF_PIN13) | \ - PIN_MODE_INPUT(GPIOF_PIN14) | \ - PIN_MODE_INPUT(GPIOF_PIN15)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | \ - PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | \ - PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | \ - PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOF_PIN15)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | \ - PIN_ODR_HIGH(GPIOF_I2C2_SCL) | \ - PIN_ODR_HIGH(GPIOF_PIN2) | \ - PIN_ODR_HIGH(GPIOF_PIN3) | \ - PIN_ODR_HIGH(GPIOF_PIN4) | \ - PIN_ODR_HIGH(GPIOF_PIN5) | \ - PIN_ODR_HIGH(GPIOF_PIN6) | \ - PIN_ODR_HIGH(GPIOF_PIN7) | \ - PIN_ODR_HIGH(GPIOF_PIN8) | \ - PIN_ODR_HIGH(GPIOF_PIN9) | \ - PIN_ODR_HIGH(GPIOF_PIN10) | \ - PIN_ODR_HIGH(GPIOF_PIN11) | \ - PIN_ODR_HIGH(GPIOF_PIN12) | \ - PIN_ODR_HIGH(GPIOF_PIN13) | \ - PIN_ODR_HIGH(GPIOF_PIN14) | \ - PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | \ - PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | \ - PIN_AFIO_AF(GPIOF_PIN2, 0) | \ - PIN_AFIO_AF(GPIOF_PIN3, 0) | \ - PIN_AFIO_AF(GPIOF_PIN4, 0) | \ - PIN_AFIO_AF(GPIOF_PIN5, 0) | \ - PIN_AFIO_AF(GPIOF_PIN6, 0) | \ - PIN_AFIO_AF(GPIOF_PIN7, 0)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \ - PIN_AFIO_AF(GPIOF_PIN9, 0) | \ - PIN_AFIO_AF(GPIOF_PIN10, 0) | \ - PIN_AFIO_AF(GPIOF_PIN11, 0) | \ - PIN_AFIO_AF(GPIOF_PIN12, 0) | \ - PIN_AFIO_AF(GPIOF_PIN13, 0) | \ - PIN_AFIO_AF(GPIOF_PIN14, 0) | \ - PIN_AFIO_AF(GPIOF_PIN15, 0)) - -/* - * GPIOG setup: - * - * PG0 - PIN0 (input pullup). - * PG1 - PIN1 (input pullup). - * PG2 - PIN2 (input pullup). - * PG3 - PIN3 (input pullup). - * PG4 - PIN4 (input pullup). - * PG5 - PIN5 (input pullup). - * PG6 - PIN6 (input pullup). - * PG7 - PIN7 (input pullup). - * PG8 - PIN8 (input pullup). - * PG9 - PIN9 (input pullup). - * PG10 - PIN10 (input pullup). - * PG11 - PIN11 (input pullup). - * PG12 - PIN12 (input pullup). - * PG13 - PIN13 (input pullup). - * PG14 - PIN14 (input pullup). - * PG15 - PIN15 (input pullup). - */ -#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ - PIN_MODE_INPUT(GPIOG_PIN1) | \ - PIN_MODE_INPUT(GPIOG_PIN2) | \ - PIN_MODE_INPUT(GPIOG_PIN3) | \ - PIN_MODE_INPUT(GPIOG_PIN4) | \ - PIN_MODE_INPUT(GPIOG_PIN5) | \ - PIN_MODE_INPUT(GPIOG_PIN6) | \ - PIN_MODE_INPUT(GPIOG_PIN7) | \ - PIN_MODE_INPUT(GPIOG_PIN8) | \ - PIN_MODE_INPUT(GPIOG_PIN9) | \ - PIN_MODE_INPUT(GPIOG_PIN10) | \ - PIN_MODE_INPUT(GPIOG_PIN11) | \ - PIN_MODE_INPUT(GPIOG_PIN12) | \ - PIN_MODE_INPUT(GPIOG_PIN13) | \ - PIN_MODE_INPUT(GPIOG_PIN14) | \ - PIN_MODE_INPUT(GPIOG_PIN15)) -#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) -#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOG_PIN15)) -#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOG_PIN15)) -#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ - PIN_ODR_HIGH(GPIOG_PIN1) | \ - PIN_ODR_HIGH(GPIOG_PIN2) | \ - PIN_ODR_HIGH(GPIOG_PIN3) | \ - PIN_ODR_HIGH(GPIOG_PIN4) | \ - PIN_ODR_HIGH(GPIOG_PIN5) | \ - PIN_ODR_HIGH(GPIOG_PIN6) | \ - PIN_ODR_HIGH(GPIOG_PIN7) | \ - PIN_ODR_HIGH(GPIOG_PIN8) | \ - PIN_ODR_HIGH(GPIOG_PIN9) | \ - PIN_ODR_HIGH(GPIOG_PIN10) | \ - PIN_ODR_HIGH(GPIOG_PIN11) | \ - PIN_ODR_HIGH(GPIOG_PIN12) | \ - PIN_ODR_HIGH(GPIOG_PIN13) | \ - PIN_ODR_HIGH(GPIOG_PIN14) | \ - PIN_ODR_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \ - PIN_AFIO_AF(GPIOG_PIN1, 0) | \ - PIN_AFIO_AF(GPIOG_PIN2, 0) | \ - PIN_AFIO_AF(GPIOG_PIN3, 0) | \ - PIN_AFIO_AF(GPIOG_PIN4, 0) | \ - PIN_AFIO_AF(GPIOG_PIN5, 0) | \ - PIN_AFIO_AF(GPIOG_PIN6, 0) | \ - PIN_AFIO_AF(GPIOG_PIN7, 0)) -#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \ - PIN_AFIO_AF(GPIOG_PIN9, 0) | \ - PIN_AFIO_AF(GPIOG_PIN10, 0) | \ - PIN_AFIO_AF(GPIOG_PIN11, 0) | \ - PIN_AFIO_AF(GPIOG_PIN12, 0) | \ - PIN_AFIO_AF(GPIOG_PIN13, 0) | \ - PIN_AFIO_AF(GPIOG_PIN14, 0) | \ - PIN_AFIO_AF(GPIOG_PIN15, 0)) - -/* - * GPIOH setup: - * - * PH0 - PIN0 (input pullup). - * PH1 - PIN1 (input pullup). - * PH2 - PIN2 (input pullup). - * PH3 - PIN3 (input pullup). - * PH4 - PIN4 (input pullup). - * PH5 - PIN5 (input pullup). - * PH6 - PIN6 (input pullup). - * PH7 - PIN7 (input pullup). - * PH8 - PIN8 (input pullup). - * PH9 - PIN9 (input pullup). - * PH10 - PIN10 (input pullup). - * PH11 - PIN11 (input pullup). - * PH12 - PIN12 (input pullup). - * PH13 - PIN13 (input pullup). - * PH14 - PIN14 (input pullup). - * PH15 - PIN15 (input pullup). - */ -#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \ - PIN_MODE_INPUT(GPIOH_PIN1) | \ - PIN_MODE_INPUT(GPIOH_PIN2) | \ - PIN_MODE_INPUT(GPIOH_PIN3) | \ - PIN_MODE_INPUT(GPIOH_PIN4) | \ - PIN_MODE_INPUT(GPIOH_PIN5) | \ - PIN_MODE_INPUT(GPIOH_PIN6) | \ - PIN_MODE_INPUT(GPIOH_PIN7) | \ - PIN_MODE_INPUT(GPIOH_PIN8) | \ - PIN_MODE_INPUT(GPIOH_PIN9) | \ - PIN_MODE_INPUT(GPIOH_PIN10) | \ - PIN_MODE_INPUT(GPIOH_PIN11) | \ - PIN_MODE_INPUT(GPIOH_PIN12) | \ - PIN_MODE_INPUT(GPIOH_PIN13) | \ - PIN_MODE_INPUT(GPIOH_PIN14) | \ - PIN_MODE_INPUT(GPIOH_PIN15)) -#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) -#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOH_PIN15)) -#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN3) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOH_PIN15)) -#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \ - PIN_ODR_HIGH(GPIOH_PIN1) | \ - PIN_ODR_HIGH(GPIOH_PIN2) | \ - PIN_ODR_HIGH(GPIOH_PIN3) | \ - PIN_ODR_HIGH(GPIOH_PIN4) | \ - PIN_ODR_HIGH(GPIOH_PIN5) | \ - PIN_ODR_HIGH(GPIOH_PIN6) | \ - PIN_ODR_HIGH(GPIOH_PIN7) | \ - PIN_ODR_HIGH(GPIOH_PIN8) | \ - PIN_ODR_HIGH(GPIOH_PIN9) | \ - PIN_ODR_HIGH(GPIOH_PIN10) | \ - PIN_ODR_HIGH(GPIOH_PIN11) | \ - PIN_ODR_HIGH(GPIOH_PIN12) | \ - PIN_ODR_HIGH(GPIOH_PIN13) | \ - PIN_ODR_HIGH(GPIOH_PIN14) | \ - PIN_ODR_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | \ - PIN_AFIO_AF(GPIOH_PIN1, 0) | \ - PIN_AFIO_AF(GPIOH_PIN2, 0) | \ - PIN_AFIO_AF(GPIOH_PIN3, 0) | \ - PIN_AFIO_AF(GPIOH_PIN4, 0) | \ - PIN_AFIO_AF(GPIOH_PIN5, 0) | \ - PIN_AFIO_AF(GPIOH_PIN6, 0) | \ - PIN_AFIO_AF(GPIOH_PIN7, 0)) -#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \ - PIN_AFIO_AF(GPIOH_PIN9, 0) | \ - PIN_AFIO_AF(GPIOH_PIN10, 0) | \ - PIN_AFIO_AF(GPIOH_PIN11, 0) | \ - PIN_AFIO_AF(GPIOH_PIN12, 0) | \ - PIN_AFIO_AF(GPIOH_PIN13, 0) | \ - PIN_AFIO_AF(GPIOH_PIN14, 0) | \ - PIN_AFIO_AF(GPIOH_PIN15, 0)) - - -/* - * USB bus activation macro, required by the USB driver. - */ -// #define usb_lld_connect_bus(usbp) -#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14))) -// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT) -/* - * USB bus de-activation macro, required by the USB driver. - */ -// #define usb_lld_disconnect_bus(usbp) -#define usb_lld_disconnect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); palClearPad(GPIOA, GPIOA_USB_DP) -// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12) - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk deleted file mode 100755 index 43377629a3..0000000000 --- a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c - -# Required include directories -BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC diff --git a/keyboards/nk65/bootloader_defs.h b/keyboards/nk65/bootloader_defs.h deleted file mode 100755 index 3b0e9d20a6..0000000000 --- a/keyboards/nk65/bootloader_defs.h +++ /dev/null @@ -1,7 +0,0 @@ -/* Address for jumping to bootloader on STM32 chips. */ -/* It is chip dependent, the correct number can be looked up here: - * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf - * This also requires a patch to chibios: - * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch - */ -#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800 diff --git a/keyboards/nk65/rules.mk b/keyboards/nk65/rules.mk index ca0a8e5855..0840daf376 100755 --- a/keyboards/nk65/rules.mk +++ b/keyboards/nk65/rules.mk @@ -1,52 +1,11 @@ -# project specific files -SRC = keyboards/wilba_tech/wt_main.c \ - keyboards/wilba_tech/wt_rgb_backlight.c \ - drivers/issi/is31fl3733.c \ - quantum/color.c \ - drivers/arm/i2c_master.c - -## chip/board settings -# the next two should match the directories in -# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) -MCU_FAMILY = STM32 -MCU_SERIES = STM32F3xx - -# Linker script to use -# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ -# or <this_dir>/ld/ -MCU_LDSCRIPT = STM32F303xC - -# Startup code to use -# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ -MCU_STARTUP = stm32f3xx - -# Board: it should exist either in <chibios>/os/hal/boards/ -# or <this_dir>/boards -BOARD = GENERIC_STM32_F303XC - -# Cortex version -MCU = cortex-m4 - -# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 -ARMV = 7 - -USE_FPU = yes - -# Vector table for application -# 0x00000000-0x00001000 area is occupied by bootlaoder.*/ -# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB -# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 -OPT_DEFS = +# MCU name +MCU = STM32F303 # Do not put the microcontroller into power saving mode # when we get USB suspend event. We want it to keep updating # backlight effects. OPT_DEFS += -DNO_SUSPEND_POWER_DOWN -# Options to pass to dfu-util when flashing -DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave -DFU_SUFFIX_ARGS = -p DF11 -v 0483 - # Build Options # comment out to disable the options. # @@ -67,3 +26,10 @@ DYNAMIC_KEYMAP_ENABLE = no CIE1931_CURVE = yes LAYOUTS = 65_ansi + +# project specific files +SRC = keyboards/wilba_tech/wt_main.c \ + keyboards/wilba_tech/wt_rgb_backlight.c \ + drivers/issi/is31fl3733.c \ + quantum/color.c \ + drivers/arm/i2c_master.c diff --git a/keyboards/planck/ez/rules.mk b/keyboards/planck/ez/rules.mk index 8e1eeeb993..7fb0dec50f 100644 --- a/keyboards/planck/ez/rules.mk +++ b/keyboards/planck/ez/rules.mk @@ -1,5 +1,5 @@ -# Cortex version -MCU = STM32F303 +# MCU name +MCU = STM32F303 # Build Options # change to "no" to disable the options, or define them in the Makefile in diff --git a/keyboards/planck/rev6/rules.mk b/keyboards/planck/rev6/rules.mk index 093d528e3e..429fc50a2c 100644 --- a/keyboards/planck/rev6/rules.mk +++ b/keyboards/planck/rev6/rules.mk @@ -1,8 +1,5 @@ -# project specific files -LAYOUTS += ortho_4x12 - -# Cortex version -MCU = STM32F303 +# MCU name +MCU = STM32F303 # Build Options # change to "no" to disable the options, or define them in the Makefile in diff --git a/keyboards/preonic/rev3/rules.mk b/keyboards/preonic/rev3/rules.mk index 33893c8413..ad8a829679 100644 --- a/keyboards/preonic/rev3/rules.mk +++ b/keyboards/preonic/rev3/rules.mk @@ -1,5 +1,5 @@ -# Cortex version -MCU = STM32F303 +# MCU name +MCU = STM32F303 # Build Options # change to "no" to disable the options, or define them in the Makefile in diff --git a/quantum/mcu_selection.mk b/quantum/mcu_selection.mk index 5102010c7b..6815a0d8a5 100644 --- a/quantum/mcu_selection.mk +++ b/quantum/mcu_selection.mk @@ -7,15 +7,15 @@ ifneq ($(findstring STM32F303, $(MCU)),) # Linker script to use # - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ - # or <this_dir>/ld/ + # or <keyboard_dir>/ld/ MCU_LDSCRIPT ?= STM32F303xC # Startup code to use # - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ MCU_STARTUP ?= stm32f3xx - # Board: it should exist either in <chibios>/os/hal/boards/ - # or <this_dir>/boards + # Board: it should exist either in <chibios>/os/hal/boards/, + # <keyboard_dir>/boards/, or drivers/boards/ BOARD ?= GENERIC_STM32_F303XC # Cortex version @@ -27,7 +27,7 @@ ifneq ($(findstring STM32F303, $(MCU)),) USE_FPU = yes # Vector table for application - # 0x00000000-0x00001000 area is occupied by bootlaoder.*/ + # 0x00000000-0x00001000 area is occupied by bootloader.*/ # The CORTEX_VTOR... is needed only for MCHCK/Infinity KB # OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 |