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| author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2021-09-23 01:31:37 +0200 |
|---|---|---|
| committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2021-09-23 01:31:37 +0200 |
| commit | c96f937b78efc3130700724c60439f4f5cc2ef2f (patch) | |
| tree | 4e623d40dae718edcd036505effe7c87da037a9f | |
| parent | f391533f6715a47dd2c71aff9615d8fc20a7bbb8 (diff) | |
i386/i386/fpu.h: Fix xrstor and xrstors macros
xrstor and xrstors also take the xsave support bitmask.
We were otherwise not necessarily properly reloading all the FPU state,
thus leading to various subtle bugs, notably with glibc 2.33's
ifunc-optimized memcpy etc.
* i386/i386/fpu.h (xrstor, xrstors): Pass fp_xsave_support in EDX:EAX.
| -rw-r--r-- | i386/i386/fpu.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/i386/i386/fpu.h b/i386/i386/fpu.h index 02b67066..51e0f31d 100644 --- a/i386/i386/fpu.h +++ b/i386/i386/fpu.h @@ -132,10 +132,14 @@ static inline void set_xcr0(uint64_t value) { , "d" ((unsigned) (fp_xsave_support >> 32))) #define xrstor(state) \ - asm volatile("xrstor %0" : : "m" (state)) + asm volatile("xrstor %0" : : "m" (state) \ + , "a" ((unsigned) fp_xsave_support) \ + , "d" ((unsigned) (fp_xsave_support >> 32))) #define xrstors(state) \ - asm volatile("xrstors %0" : : "m" (state)) + asm volatile("xrstors %0" : : "m" (state) \ + , "a" ((unsigned) fp_xsave_support) \ + , "d" ((unsigned) (fp_xsave_support >> 32))) #define fwait() \ asm("fwait"); |