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authorSamuel Thibault <samuel.thibault@ens-lyon.org>2020-11-28 16:30:29 +0100
committerSamuel Thibault <samuel.thibault@ens-lyon.org>2020-11-28 17:46:32 +0100
commitb885c5ea26fb3c2f2d91b6e9a1495070da429ea4 (patch)
tree787f167688bf7518b62241fa55c539da3fa53ed5 /linux
parent44e3fb20a17dac403ec022a9c4d41dc237f3c79d (diff)
x86: Add XSAVE support
* i386/i386/fpu.h (CPU_XCR0_X87, CPU_XCR0_SSE, CPU_XCR0_AVX, CPU_XCR0_MPX, CPU_XCR0_AVX512): New macros. (xsave): Pass fp_xsave_support to xsave. (fpu_save_context): When fp_kind is FP_387X, use xsave. (fp_xsave_support): New variable declaration. * i386/i386/proc_reg.h (cpuid): New macro. * linux/src/include/asm-i386/processor.h (cpuid): Disable macro. * i386/include/mach/i386/fp_reg.h: Include <stdint.h> (i386_xfp_xstate_header): New structure. (i386_xfp_save): Add xsave fields. * i386/i386/fpu.c (fp_xsave_support): New variable. (init_fpu): Look for XSAVE feature; if available, get the supported parts and set fp_kind to FP_387X. (fpu_module_init): Set ifps_cache alignment to alignof(struct i386_fpsave_state). (fpu_set_state): Make sure to clear all the ifps structure. Reuse the FP_387FX for the FP_387X case. (fpu_get_state, fpexterrflt, fpastintr, fp_state_alloc): Reuse the FP_387FX for the FP_387X case. (fp_save): When fp_kind is FP_387X, use xsave. (fp_load): When fp_kind is FP_387X, use xrstor. Reuse the FP_387FX for the FP_387X case.
Diffstat (limited to 'linux')
-rw-r--r--linux/src/include/asm-i386/processor.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/linux/src/include/asm-i386/processor.h b/linux/src/include/asm-i386/processor.h
index 2bcacea0..b0679402 100644
--- a/linux/src/include/asm-i386/processor.h
+++ b/linux/src/include/asm-i386/processor.h
@@ -29,6 +29,7 @@ extern int have_cpuid; /* We have a CPUID */
extern unsigned long cpu_hz; /* CPU clock frequency from time.c */
+#if 0
/*
* Detection of CPU model (CPUID).
*/
@@ -42,6 +43,7 @@ extern inline void cpuid(int op, int *eax, int *ebx, int *ecx, int *edx)
: "a" (op)
: "cc");
}
+#endif
/*
* Cyrix CPU register indexes (use special macros to access these)