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authorSamuel Thibault <samuel.thibault@ens-lyon.org>2023-10-28 13:05:33 +0200
committerSamuel Thibault <samuel.thibault@ens-lyon.org>2023-10-28 13:06:39 +0200
commit0ea8f34d6b2d37cb5027a9cd8d143b0d6b701613 (patch)
tree36b06a38574b15555466f08dcfa1deb95ca28df3 /i386
parentfc47cd4ec8314c3df45a6cedc2d633bd52bca01e (diff)
64bit: Fix locore build
To allow references to int_stack_base to be quite unconstrained, we need to use 64bit register indexing. CPU_NUMBER_NO_GS was missing a 64bit variant. CPU_NUMBER_NO_STACK assumes being passed a 32bit register.
Diffstat (limited to 'i386')
-rw-r--r--i386/i386/cpu_number.h23
1 files changed, 22 insertions, 1 deletions
diff --git a/i386/i386/cpu_number.h b/i386/i386/cpu_number.h
index 7ec3da5f..67c19e9b 100644
--- a/i386/i386/cpu_number.h
+++ b/i386/i386/cpu_number.h
@@ -47,6 +47,7 @@
shrl $24, reg ;\
movl %cs:CX(cpu_id_lut, reg), reg ;\
+#ifdef __i386__
/* Never call CPU_NUMBER_NO_GS(%esi) */
#define CPU_NUMBER_NO_GS(reg) \
pushl %esi ;\
@@ -63,7 +64,27 @@
popl %ebx ;\
popl %eax ;\
movl %esi, reg ;\
- popl %esi ;\
+ popl %esi
+#endif
+#ifdef __x86_64__
+/* Never call CPU_NUMBER_NO_GS(%esi) */
+#define CPU_NUMBER_NO_GS(reg) \
+ pushq %rsi ;\
+ pushq %rax ;\
+ pushq %rbx ;\
+ pushq %rcx ;\
+ pushq %rdx ;\
+ movl $1, %eax ;\
+ cpuid ;\
+ shrl $24, %ebx ;\
+ movl %cs:CX(cpu_id_lut, %ebx), %esi ;\
+ popq %rdx ;\
+ popq %rcx ;\
+ popq %rbx ;\
+ popq %rax ;\
+ movl %esi, reg ;\
+ popq %rsi
+#endif
#define CPU_NUMBER(reg) \
movl MY(CPU_ID), reg;