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2024-03-04vm_allocate_contiguous: Add missing page unwiring after making the area ↵HEADmasterSamuel Thibault
non-pageable Otherwise, if the allocated memory is passed over for returning data such as in device_read, we end up with ../vm/vm_map.c:4245: vm_map_copyin_page_list: Assertion `src_entry->wired_count > 0' failed.Debugger invoked: assertion failure
2024-03-04x86_64 locore: Check segmentation by handSamuel Thibault
x86_64 ignores the segmentation limit, so we have to check it by hand when accessing userland pointers. Reported-by: Sergey Bugaev <bugaevc@gmail.com>
2024-03-03pmap: Avoid leaking USER bit in page tablesSamuel Thibault
We should only set USER - for user processes maps - for 32bit Xen support This was not actually posing problem since in 32bit segmentation protects us, and in 64bit the l4 entry for the kernel is already set. But better be safe than sorry.
2024-03-03kernel traps: also catch general protection faultsSamuel Thibault
If userland passes a kernel pointer, it's not a page fault that we get, but a general protection fault. We also want to go through the recovery in that case, to make e.g. copyin/out return an error.
2024-02-28Check for null ports in task_set_essential, task_set_name and thread_set_name.Flavio Cruz
Otherwise, it is easy to crash the kernel if userland passes arbitrary port names. Message-ID: <ZdriTgNhPsfu7c2M@jupiter.tail36e24.ts.net>
2024-02-23vm_map: Add comment and assert for vm_map_deleteDamien Zammit
This will prevent calling vm_map_delete without the map locked unless ref_count is zero. Message-ID: <20240223081505.458240-1-damien@zamaudio.com>
2024-02-23spl: Introduce assert_splvm and use it in process_pmap_updatesSamuel Thibault
Suggested-by: Damien Zammit <damien@zamaudio.com>
2024-02-23kern: move pset_idle_lock/unlock to headerSamuel Thibault
so that kern/machine.c can use it
2024-02-23kern: Use _nocheck variants of locks taken at splsched()Damien Zammit
Fixes assertion errors when LDEBUG is compiled in. Message-ID: <20240223081404.458062-1-damien@zamaudio.com>
2024-02-23kern: Use _irq variant of lock and disable interruptsDamien Zammit
During quantum adjustment, disable interrupts and call appropriate lock. Message-ID: <20240223080948.457792-1-damien@zamaudio.com>
2024-02-23kern/processor: Do not set default_pset.empty on bootstrapDamien Zammit
This is not needed because cpu_up does this when it comes online, it calls pset_add_processor(). Message-ID: <20240223080357.457465-1-damien@zamaudio.com>
2024-02-22kern/gsync: Use vm_map_lookup with keep_map_lockedDamien Zammit
This prevents a deadlock in smp where a read lock on the map is taken in gsync and then the map is locked again inside vm_map_lookup() but another thread had a pre-existing write lock, therefore the second read lock blocks. This is fixed by removing the initial gsync read lock on the map but keeping the read lock held upon returning from vm_map_lookup(). Co-Authored-By: Sergey Bugaev <bugaevc@gmail.com> Message-ID: <20240222082410.422869-4-damien@zamaudio.com>
2024-02-22vm_map_lookup: Add parameter for keeping map lockedDamien Zammit
This adds a parameter called keep_map_locked to vm_map_lookup() that allows the function to return with the map locked. This is to prepare for fixing a bug with gsync where the map is locked twice by mistake. Co-Authored-By: Sergey Bugaev <bugaevc@gmail.com> Message-ID: <20240222082410.422869-3-damien@zamaudio.com>
2024-02-19Fix compile with MACH_LOCK_MONDamien Zammit
2024-02-19ddb: Use _irq variants of locks to satisfy LDEBUG assertsDamien Zammit
2024-02-19Introduce and use assert_splsched()Samuel Thibault
2024-02-19process_pmap_updates: Use _nocheck form of lock, already at splvmDamien Zammit
2024-02-19kern: Fix parenthesis around assignment used as valueDamien Zammit
2024-02-18locore: Remove unnecessary call to CPU_NUMBERDamien Zammit
The cpu number is already in edx register, so use that.
2024-02-12smp: Set processor set to non-empty when adding a processorDamien Zammit
This allows the slave_pset to be used for actual tasks with the processor_set RPCs. Message-ID: <20240212053817.1919056-1-damien@zamaudio.com>
2024-02-12Add documentation for thread_set_nameSamuel Thibault
2024-02-12Add thread_set_name RPC.Flavio Cruz
Like task_set_name, we use the same size as the task name and will inherit the task name, whenever it exists. This will be used to implement pthread_setname_np. Message-ID: <20240212062634.1082207-2-flaviocruz@gmail.com>
2024-02-12Replace kernel header includes in include/mach/mach_types.h with forward ↵Flavio Cruz
declarations. I was trying to reuse TASK_NAME_SIZE in kern/thread.h but it was impossible because files included from kern/task.h end up requiring kern/thread.h (through percpu.h), creating a recursive dependency. With this change, mach_types.h only defines forward declarations and modules have to explicitly include the appropriate header file if they want to be able touch those structures. Most of the other includes are required because we no longer grab many different includes through mach_types.h. Message-ID: <20240212062634.1082207-1-flaviocruz@gmail.com>
2024-02-11Enable MACH_HOSTDamien Zammit
This is only enabled when NCPUS > 1. Enables some code paths that allows userspace to manage cpu resources via processor set RPCs. Message-ID: <20240211120023.1889731-1-damien@zamaudio.com>
2024-02-11task: fix addressability of assign_active fieldSamuel Thibault
It is used for thread_wakeup and alike.
2024-02-11smp: Create AP processor set and put all APs inside itDamien Zammit
This has the effect of running with one cpu only with smp, but has the ability to enable APs in userspace with the right processor set RPCs. Message-ID: <20240211120051.1889789-1-damien@zamaudio.com>
2024-02-11ddb: Make show all runqs iterate over psets.Damien Zammit
2024-02-11smp: Fix unable to enter kdb during bootDamien Zammit
Message-ID: <20240211115958.1889648-1-damien@zamaudio.com>
2024-02-11smp: Fix parenthesis around logic expression valueDamien Zammit
Message-ID: <20240211070915.1879676-1-damien@zamaudio.com>
2024-02-10Fix build with APIC without SMPSamuel Thibault
2024-02-09smp: Fix compile error with missing apboot_addrDamien Zammit
Message-ID: <20240209021108.1715770-1-damien@zamaudio.com>
2024-02-09smp: Fix INIT/STARTUP IPI sequenceDamien Zammit
TESTED: works in qemu TESTED: works hardware with AMD cpu Message-ID: <20240207050158.1640853-5-damien@zamaudio.com>
2024-02-09SMP: Fix allocating the apboot pageSamuel Thibault
vm_page_grab_contig does not necessarily allocate at the beginning of the DMA segment, so rather allocate by hand very early.
2024-02-08fpu: Fix cpuid feature detectionOlivier Valentin
Make sure to fetch capabilities from cpuid(0xd,0x1) Message-ID: <20240208165015.4700-3-valentio@free.fr>
2024-02-08Revert "fpu: Fix cpuid feature detection"Olivier Valentin
This reverts commit f8d0f98e80b3d7d9b24fa077818113fb0f4b3970. Message-ID: <20240208165015.4700-2-valentio@free.fr>
2024-02-08smp: Use HPET instead of pit one-shot that is unreliableDamien Zammit
NB: Every x86 board that uses ACPI most likely has a HPET since 2005. We can roll back to PIT in the cases where its not present, but the PIT one shot code is definitely currently broken. Message-ID: <20240207050158.1640853-4-damien@zamaudio.com>
2024-02-08Add HPET timer for small accurate delaysDamien Zammit
TESTED: This works in qemu correctly TESTED: This works on an AMD board with ACPI v2.0 correctly Message-ID: <20240207050158.1640853-3-damien@zamaudio.com>
2024-02-08separate lapic_enable from lapic_setupDamien Zammit
This initializes the lapic without turning on the IOAPIC interrupts during SMP init. Message-ID: <20240207050158.1640853-2-damien@zamaudio.com>
2024-02-05apboot: avoid self-modifying codeSamuel Thibault
self-modifying code is generally frowned upon, Intel largely says the support is model-dependent. We can as well just relocate from the C code like we did for the temporary gdt.
2024-02-05smp: Remove hardcoded AP_BOOT_ADDRDamien Zammit
This took some time to figure out. Involves a hand-crafted 16 bit assembly instruction [1] because it requires an immediate for the memory address of far jump. This required self-modifying code to inject the next instruction, therefore I added a near jump to clear the instruction cache queue in case the pipeline cached the unmodified jump location. [1] Intel Architecture Software Developer's Manual, Volume 2: Instruction Set Reference Manual
2024-02-05Fix apic_send_ipi function clobbering read only fieldsDamien Zammit
This was the root cause of failing to INIT. We were clobbering remote_read_status. And also, we need to reference the .r register when writing the ICR regs otherwise I think it writes all of the block. Message-ID: <20240205113327.1568218-2-damien@zamaudio.com>
2024-02-04vm_pages_phys: Avoid faults while we keep vm locksSamuel Thibault
In principle we are actually writing to the allocated area outside of the vm lock, but better be safe in case somebody changes things.
2024-02-01ACPI: Support XSDT (ACPI >= v2.0)Damien Zammit
This enables gnumach to additionally parse the XSDT table if the revision of ACPI is 2. TESTED: Still works on qemu (ACPI v1.0) TESTED: Works on a x86 board with XSDT (ACPI v2.0) Message-ID: <20240131021218.1335821-1-damien@zamaudio.com>
2024-02-01model_dep: Fix serial console with APIC enabledDamien Zammit
Move cninit() further down so that IOAPIC has a chance to initialize before the com port interrupt is unmasked in the IOAPIC, fixing a fault and reboot. Message-ID: <20240131100210.1354522-1-damien@zamaudio.com>
2024-01-31fix doc buildSamuel Thibault
2024-01-30Add vm_pages_physSamuel Thibault
For rumpdisk to efficiently determine the physical address, both for checking whether it is below 4GiB, and for giving it to the disk driver, we need a gnumach primitive (and that is not conditioned by MACH_VM_DEBUG like mach_vm_region_info and mach_vm_object_pages_phys are).
2024-01-30apic: Set up LAPICs in xAPIC modeDamien Zammit
Clear flag in msr for xAPIC mode. Message-ID: <20240130080405.1304381-1-damien@zamaudio.com>
2024-01-29Support up to two IOAPICs with up to 32 GSIs on eachDamien Zammit
Previously, only IOAPIC[0] was supported. Now this supports up to two IOAPICs. Message-ID: <20240129100652.1262126-1-damien@zamaudio.com>
2024-01-27fpu: Fix cpuid feature detectionOlivier Valentin
Make sure to fetch capabilities from cpuid(0xd,0x1) and max structure sizes from cpuid(0xd,0x0). Message-ID: <20240124080019.8136-1-valentio@free.fr>
2024-01-27ioapic: Remove IMCR toggleDamien Zammit
Since we are not using legacy MP tables but intending to use ACPI to configure interrupt routing, we can assume all boards have virtual wire mode, thus do not require setting of IMCR register. (This may fix crashes on machines that do not have IMCR registers). Message-ID: <20240124035138.1044855-2-damien@zamaudio.com>