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| author | AlmuHS <almuhs@github.com> | 2019-06-15 21:12:48 +0200 |
|---|---|---|
| committer | AlmuHS <almuhs@github.com> | 2019-06-15 21:12:48 +0200 |
| commit | 654e02e85b7cb80ed1748758d3b900fc21a2dcaf (patch) | |
| tree | 992e178440726710ceb08424539cc88024cd18ce | |
| parent | 272af22984d1afcbb10b9d3451e1a8cee901baab (diff) | |
docs: fix register in paging section
| -rw-r--r-- | README.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -297,7 +297,7 @@ We have split this task in some steps: Before add the cpus to the kernel, we need to configure paging in them, to allow fully access to the memory. -To enable paging, we need to initialize CR0, CR2 and CR4 registers. as similar for to [this](https://github.com/AlmuHS/GNUMach_SMP/blob/smp/i386/i386at/model_dep.c#L477-L500). +To enable paging, we need to initialize CR0, CR3 and CR4 registers. as similar for to [this](https://github.com/AlmuHS/GNUMach_SMP/blob/smp/i386/i386at/model_dep.c#L477-L500). This code, translated to assembly, has been added to [`cpuboot.S`](https://github.com/AlmuHS/GNUMach_SMP/blob/wip/i386/i386/cpuboot.S) assembly routine. |