experiment: configure pmap from C function

4 files changed, 42 insertions, 1 deletions

diff --git a/i386/i386/cpuboot.S b/i386/i386/cpuboot.S
index e19e7a5c..b15640c7 100644
--- a/i386/i386/cpuboot.S
+++ b/i386/i386/cpuboot.S
@@ -97,6 +97,7 @@ _apboot:
 
 	pushl stack_ptr
 
+	call pmap_conf
 	call cpu_ap_main
 	cli
 
diff --git a/i386/i386/locore.h b/i386/i386/locore.h
index 6948f72d..ece8aafa 100644
--- a/i386/i386/locore.h
+++ b/i386/i386/locore.h
@@ -81,7 +81,7 @@ extern unsigned int cpu_features[1];
 #define CPU_FEATURE_CFLSH	19
 #define CPU_FEATURE_DS		21
 #define CPU_FEATURE_ACPI	22
-#define CPU_FEATURE_MMX		23
+#define CPU_FEATURE_MMX	    23
 #define CPU_FEATURE_FXSR	24
 #define CPU_FEATURE_SSE		25
 #define CPU_FEATURE_SSE2	26
diff --git a/i386/i386/mp_desc.c b/i386/i386/mp_desc.c
index 7117a96f..5e3899b7 100644
--- a/i386/i386/mp_desc.c
+++ b/i386/i386/mp_desc.c
@@ -51,6 +51,7 @@
 #include <string.h>
 #include <include/stdint.h> //uint16_t, uint32_t_t...
 #include <imps/apic.h>
+#include <i386/locore.h>
 
 /*
  * The i386 needs an interrupt stack to keep the PCB stack from being
@@ -153,6 +154,8 @@ void* stack_ptr = 0;
 #define SEND_PENDING 1
 
 extern int lapic_addr;
+extern pt_entry_t *kernel_page_dir;
+
 
 /*
  * Allocate and initialize the per-processor descriptor tables.
@@ -290,6 +293,42 @@ void startup_cpu(uint32_t apic_id)
 
 }
 
+void pmap_conf()
+{
+#ifdef	MACH_PV_PAGETABLES
+    for (i = 0; i < PDPNUM; i++)
+        pmap_set_page_readonly_init((void*) kernel_page_dir + i * INTEL_PGBYTES);
+#if PAE
+    pmap_set_page_readonly_init(kernel_pmap->pdpbase);
+#endif	/* PAE */
+#endif	/* MACH_PV_PAGETABLES */
+#if PAE
+    set_cr3((unsigned)_kvtophys(kernel_pmap->pdpbase));
+#ifndef	MACH_HYP
+    if (!CPU_HAS_FEATURE(CPU_FEATURE_PAE))
+        panic("CPU doesn't have support for PAE.");
+    set_cr4(get_cr4() | CR4_PAE);
+#endif	/* MACH_HYP */
+#else
+    set_cr3((unsigned)_kvtophys(kernel_page_dir));
+#endif	/* PAE */
+#ifndef	MACH_HYP
+    /* Turn paging on.
+     * Also set the WP bit so that on 486 or better processors
+     * page-level write protection works in kernel mode.
+     */
+    set_cr0(get_cr0() | CR0_PG | CR0_WP);
+    set_cr0(get_cr0() & ~(CR0_CD | CR0_NW));
+    if (CPU_HAS_FEATURE(CPU_FEATURE_PGE))
+        set_cr4(get_cr4() | CR4_PGE);
+#endif	/* MACH_HYP */
+    flush_instr_queue();
+#ifdef	MACH_PV_PAGETABLES
+    pmap_clear_bootstrap_pagetable((void *)boot_info.pt_base);
+#endif	/* MACH_PV_PAGETABLES */
+
+}
+
 int
 cpu_setup()
 {
diff --git a/i386/i386/mp_desc.h b/i386/i386/mp_desc.h
index 549738fc..55f9c08f 100644
--- a/i386/i386/mp_desc.h
+++ b/i386/i386/mp_desc.h
@@ -82,6 +82,7 @@ extern kern_return_t intel_startCPU(int slot_num);
 
 extern void interrupt_processor(int cpu);
 extern void startup_cpu(uint32_t apic_id);
+extern void pmap_conf();
 extern int cpu_ap_main();
 extern int cpu_setup();