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| author | Xi Ruoyao <xry111@xry111.site> | 2024-02-05 20:17:25 +0800 |
|---|---|---|
| committer | Xi Ruoyao <xry111@xry111.site> | 2024-02-05 20:21:15 +0800 |
| commit | e6a94f135c13271bcfe9198c841aeeffc64ee78a (patch) | |
| tree | 32aa58f36087f3f221897a88d2f07bd9a8805518 | |
| parent | e2e6d567621f4b04b29cca31e21360438a1be356 (diff) | |
mips: Fix missing mode in neg<mode:MSA>2
I was too sleepy writting this :(.
gcc/ChangeLog:
* config/mips/mips-msa.md (neg<mode:MSA>2): Add missing mode for
neg.
(cherry picked from commit 55357960fbddd261e32f088f5dd328d58b0f25b3)
| -rw-r--r-- | gcc/config/mips/mips-msa.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/mips/mips-msa.md b/gcc/config/mips/mips-msa.md index 60516402631..98045154673 100644 --- a/gcc/config/mips/mips-msa.md +++ b/gcc/config/mips/mips-msa.md @@ -613,7 +613,7 @@ (define_insn "neg<mode>2" [(set (match_operand:FMSA 0 "register_operand" "=f") - (neg (match_operand:FMSA 1 "register_operand" "f")))] + (neg:FMSA (match_operand:FMSA 1 "register_operand" "f")))] "ISA_HAS_MSA" "bnegi.<msafmt>\t%w0,%w1,<elmsgnbit>" [(set_attr "type" "simd_bit") |