diff options
| author | John David Anglin <danglin@gcc.gnu.org> | 2024-02-01 18:46:47 +0000 |
|---|---|---|
| committer | John David Anglin <danglin@gcc.gnu.org> | 2024-02-01 19:25:17 +0000 |
| commit | 71da618c66b8ec41065c299aa0834478f4ebfe54 (patch) | |
| tree | 78ddced17f5863f34b0601888cd90dde40c7a16f | |
| parent | 0f206260eac4fb2441554af4b6a21a6536261952 (diff) | |
hppa: Fix bug in atomic_storedi_1 pattern
The first alternative stores the floating-point status register
in the destination. It should store zero. We need to copy %fr0
to another floating-point register to initialize it to zero.
2024-02-01 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
* config/pa/pa.md (atomic_storedi_1): Fix bug in
alternative 1.
| -rw-r--r-- | gcc/config/pa/pa.md | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 3e0bfb09da2..b252486fa94 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -10488,13 +10488,13 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" (define_insn "atomic_storedi_1" [(set (mem:DI (match_operand:SI 0 "register_operand" "r,r")) (match_operand:DI 1 "reg_or_0_operand" "M,r")) - (clobber (match_scratch:DI 2 "=X,f"))] + (clobber (match_scratch:DI 2 "=f,f"))] "!TARGET_64BIT && !TARGET_SOFT_FLOAT" "@ - {fstds|fstd} %%fr0,0(%0) + fcpy,dbl %%fr0,%2\n\t{fstds|fstd} %2,0(%0) {stws|stw} %1,-16(%%sp)\n\t{stws|stw} %R1,-12(%%sp)\n\t{fldds|fldd} -16(%%sp),%2\n\t{fstds|fstd} %2,0(%0)" [(set_attr "type" "move,move") - (set_attr "length" "4,16")]) + (set_attr "length" "8,16")]) ;; PA 2.0 hardware supports out-of-order execution of loads and stores, so ;; we need memory barriers to enforce program order for memory references |